^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * tsunami.S: High speed MicroSparc-I mmu/cache operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/psr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/pgtsrmmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .globl tsunami_flush_cache_all, tsunami_flush_cache_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .globl tsunami_flush_cache_range, tsunami_flush_cache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .globl tsunami_flush_page_to_ram, tsunami_flush_page_for_dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .globl tsunami_flush_sig_insns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .globl tsunami_flush_tlb_all, tsunami_flush_tlb_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .globl tsunami_flush_tlb_range, tsunami_flush_tlb_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* Sliiick... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) tsunami_flush_cache_page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) tsunami_flush_cache_range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ld [%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) tsunami_flush_cache_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ld [%o0 + AOFF_mm_context], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) cmp %g2, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) be tsunami_flush_cache_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) tsunami_flush_cache_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) WINDOW_FLUSH(%g4, %g5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) tsunami_flush_page_for_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) sta %g0, [%g0] ASI_M_IC_FLCLEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) sta %g0, [%g0] ASI_M_DC_FLCLEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) tsunami_flush_cache_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) tsunami_flush_page_to_ram:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) tsunami_flush_sig_insns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) flush %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) flush %o1 + 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* More slick stuff... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) tsunami_flush_tlb_range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ld [%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) tsunami_flush_tlb_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ld [%o0 + AOFF_mm_context], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) cmp %g2, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) be tsunami_flush_tlb_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) tsunami_flush_tlb_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mov 0x400, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) sta %g0, [%o1] ASI_M_FLUSH_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) tsunami_flush_tlb_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* This one can be done in a fine grained manner... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) tsunami_flush_tlb_page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ld [%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mov SRMMU_CTX_REG, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ld [%o0 + AOFF_mm_context], %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) andn %o1, (PAGE_SIZE - 1), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) cmp %o3, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) be tsunami_flush_tlb_page_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) lda [%g1] ASI_M_MMUREGS, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) sta %o3, [%g1] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) sta %g0, [%o1] ASI_M_FLUSH_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) tsunami_flush_tlb_page_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) sta %g5, [%g1] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ldd [src + offset + 0x18], t0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) std t0, [dst + offset + 0x18]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ldd [src + offset + 0x10], t2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) std t2, [dst + offset + 0x10]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ldd [src + offset + 0x08], t0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) std t0, [dst + offset + 0x08]; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ldd [src + offset + 0x00], t2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) std t2, [dst + offset + 0x00];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) tsunami_copy_1page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* NOTE: This routine has to be shorter than 70insns --jj */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) or %g0, (PAGE_SIZE >> 8), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) subcc %g1, 1, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) add %o0, 0x100, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bne 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) add %o1, 0x100, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .globl tsunami_setup_blockops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) tsunami_setup_blockops:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) sethi %hi(__copy_1page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) or %o0, %lo(__copy_1page), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) sethi %hi(tsunami_copy_1page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) or %o1, %lo(tsunami_copy_1page), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) sethi %hi(tsunami_setup_blockops), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) or %o2, %lo(tsunami_setup_blockops), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ld [%o1], %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 1: add %o1, 4, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) st %o4, [%o0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) add %o0, 4, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) cmp %o1, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) bne 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ld [%o1], %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) sta %g0, [%g0] ASI_M_IC_FLCLEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) sta %g0, [%g0] ASI_M_DC_FLCLEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) nop