Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * swift.S: MicroSparc-II mmu/cache operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 1999 David S. Miller (davem@redhat.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <asm/psr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/pgtsrmmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	.align	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #if 1	/* XXX screw this, I can't get the VAC flushes working
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	 * XXX reliably... -DaveM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	.globl	swift_flush_cache_all, swift_flush_cache_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	.globl	swift_flush_cache_range, swift_flush_cache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	.globl	swift_flush_page_for_dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.globl	swift_flush_page_to_ram
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) swift_flush_cache_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) swift_flush_cache_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) swift_flush_cache_range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) swift_flush_cache_page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) swift_flush_page_for_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) swift_flush_page_to_ram:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	sethi	%hi(0x2000), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 1:	subcc	%o0, 0x10, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	add	%o0, %o0, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	sta	%g0, [%o0] ASI_M_DATAC_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	 sta	%g0, [%o1] ASI_M_TXTC_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	.globl	swift_flush_cache_all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) swift_flush_cache_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	WINDOW_FLUSH(%g4, %g5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	/* Just clear out all the tags. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	sethi	%hi(16 * 1024), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 1:	subcc	%o0, 16, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	sta	%g0, [%o0] ASI_M_TXTC_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 sta	%g0, [%o0] ASI_M_DATAC_TAG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.globl	swift_flush_cache_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) swift_flush_cache_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	ld	[%o0 + AOFF_mm_context], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	cmp	%g2, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	be	swift_flush_cache_mm_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	WINDOW_FLUSH(%g4, %g5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	rd	%psr, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	andn	%g1, PSR_ET, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	wr	%g3, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	mov	SRMMU_CTX_REG, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	lda	[%g7] ASI_M_MMUREGS, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	sta	%g2, [%g7] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	sethi	%hi(0x2000), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 1:	subcc	%o0, 0x10, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	sta	%g0, [%o0] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	clr	%o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	or	%g0, 2048, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	or	%g0, 2048, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	add	%o1, 2048, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	add	%o2, 2048, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	mov	16, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	add	%o4, 2048, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	add	%o5, 2048, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	add	%g2, 2048, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 1:	sta	%g0, [%o0      ] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	sta	%g0, [%o0 + %o1] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	sta	%g0, [%o0 + %o2] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	sta	%g0, [%o0 + %o3] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	sta	%g0, [%o0 + %o4] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	sta	%g0, [%o0 + %o5] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	sta	%g0, [%o0 + %g2] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	sta	%g0, [%o0 + %g3] ASI_M_FLUSH_CTX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	subcc	%g7, 32, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	 add	%o0, 32, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	mov	SRMMU_CTX_REG, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	sta	%g5, [%g7] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	wr	%g1, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) swift_flush_cache_mm_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	.globl	swift_flush_cache_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) swift_flush_cache_range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	ld	[%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	sub	%o2, %o1, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	sethi	%hi(4096), %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	cmp	%o2, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	bgu	swift_flush_cache_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	b	70f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.globl	swift_flush_cache_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) swift_flush_cache_page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	ld	[%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 70:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	ld	[%o0 + AOFF_mm_context], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	cmp	%g2, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	be	swift_flush_cache_page_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	WINDOW_FLUSH(%g4, %g5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	rd	%psr, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	andn	%g1, PSR_ET, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	wr	%g3, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	mov	SRMMU_CTX_REG, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	lda	[%g7] ASI_M_MMUREGS, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	sta	%g2, [%g7] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	andn	%o1, (PAGE_SIZE - 1), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	sethi	%hi(0x1000), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 1:	subcc	%o0, 0x10, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	sta	%g0, [%o1 + %o0] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	or	%g0, 512, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	or	%g0, 512, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	add	%o0, 512, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	add	%o2, 512, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	add	%o3, 512, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	add	%o4, 512, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	add	%o5, 512, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	add	%g3, 512, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 1:	sta	%g0, [%o1      ] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	sta	%g0, [%o1 + %o0] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	sta	%g0, [%o1 + %o2] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	sta	%g0, [%o1 + %o3] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	sta	%g0, [%o1 + %o4] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	sta	%g0, [%o1 + %o5] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	sta	%g0, [%o1 + %g3] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	sta	%g0, [%o1 + %g4] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	subcc	%g7, 16, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	 add	%o1, 16, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	mov	SRMMU_CTX_REG, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	sta	%g5, [%g7] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	wr	%g1, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) swift_flush_cache_page_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	/* Swift is write-thru, however it is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 * I/O nor TLB-walk coherent.  Also it has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	 * caches which are virtually indexed and tagged.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	.globl	swift_flush_page_for_dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	.globl	swift_flush_page_to_ram
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) swift_flush_page_for_dma:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) swift_flush_page_to_ram:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	andn	%o0, (PAGE_SIZE - 1), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	sethi	%hi(0x1000), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 1:	subcc	%o0, 0x10, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	sta	%g0, [%o1 + %o0] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	or	%g0, 512, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	or	%g0, 512, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	add	%o0, 512, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	add	%o2, 512, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	add	%o3, 512, %o4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	add	%o4, 512, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	add	%o5, 512, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	add	%g3, 512, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 1:	sta	%g0, [%o1      ] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	sta	%g0, [%o1 + %o0] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	sta	%g0, [%o1 + %o2] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	sta	%g0, [%o1 + %o3] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	sta	%g0, [%o1 + %o4] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	sta	%g0, [%o1 + %o5] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	sta	%g0, [%o1 + %g3] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	sta	%g0, [%o1 + %g4] ASI_M_FLUSH_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	subcc	%g7, 16, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	bne	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	 add	%o1, 16, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.globl	swift_flush_sig_insns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) swift_flush_sig_insns:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	flush	%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	 flush	%o1 + 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	.globl	swift_flush_tlb_mm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	.globl	swift_flush_tlb_range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	.globl	swift_flush_tlb_all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) swift_flush_tlb_range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	ld	[%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) swift_flush_tlb_mm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ld	[%o0 + AOFF_mm_context], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	cmp	%g2, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	be	swift_flush_tlb_all_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) swift_flush_tlb_all:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	mov	0x400, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	sta	%g0, [%o1] ASI_M_FLUSH_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) swift_flush_tlb_all_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	.globl	swift_flush_tlb_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) swift_flush_tlb_page:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	ld	[%o0 + VMA_VM_MM], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	mov	SRMMU_CTX_REG, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	ld	[%o0 + AOFF_mm_context], %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	andn	%o1, (PAGE_SIZE - 1), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	cmp	%o3, -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	be	swift_flush_tlb_page_out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	mov	0x400, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	sta	%g0, [%o1] ASI_M_FLUSH_PROBE	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	lda	[%g1] ASI_M_MMUREGS, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	sta	%o3, [%g1] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	sta	%g0, [%o1] ASI_M_FLUSH_PAGE	/* rem. virt. cache. prot. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	sta	%g0, [%o1] ASI_M_FLUSH_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	sta	%g5, [%g1] ASI_M_MMUREGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) swift_flush_tlb_page_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	retl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	 nop