^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) __asm__ ("addcc %r4,%5,%1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) "addx %r2,%3,%0\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) : "=r" (sh), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) "=&r" (sl) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) : "%rJ" ((USItype)(ah)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) "rI" ((USItype)(bh)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) "%rJ" ((USItype)(al)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "rI" ((USItype)(bl)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) : "cc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) __asm__ ("subcc %r4,%5,%1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) "subx %r2,%3,%0\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) : "=r" (sh), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "=&r" (sl) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) : "rJ" ((USItype)(ah)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) "rI" ((USItype)(bh)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) "rJ" ((USItype)(al)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) "rI" ((USItype)(bl)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) : "cc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define umul_ppmm(w1, w0, u, v) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) __asm__ ("! Inlined umul_ppmm\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) "wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) "sra %3,31,%%g2 ! Don't move this insn\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) "and %2,%%g2,%%g2 ! Don't move this insn\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "andcc %%g0,0,%%g1 ! Don't move this insn\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "mulscc %%g1,%3,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "mulscc %%g1,0,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) "add %%g1,%%g2,%0\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "rd %%y,%1\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) : "=r" (w1), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "=r" (w0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) : "%rI" ((USItype)(u)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) "r" ((USItype)(v)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) : "%g1", "%g2", "cc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* It's quite necessary to add this much assembler for the sparc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) The default udiv_qrnnd (in C) is more than 10 times slower! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define udiv_qrnnd(q, r, n1, n0, d) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) __asm__ ("! Inlined udiv_qrnnd\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "mov 32,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "subcc %1,%2,%%g0\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) "1: bcs 5f\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) "sub %1,%2,%1 ! this kills msb of n\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) "addx %1,%1,%1 ! so this can't give carry\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) "subcc %%g1,1,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "2: bne 1b\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) "subcc %1,%2,%%g0\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "bcs 3f\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) "b 3f\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) "sub %1,%2,%1 ! this kills msb of n\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) "4: sub %1,%2,%1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) "5: addxcc %1,%1,%1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) "bcc 2b\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "subcc %%g1,1,%%g1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) "! Got carry from n. Subtract next step to cancel this carry.\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) "bne 4b\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) "addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) "sub %1,%2,%1\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) "3: xnor %0,0,%0\n\t" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) "! End of inline udiv_qrnnd\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) : "=&r" (q), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) "=&r" (r) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) : "r" ((USItype)(d)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "1" ((USItype)(n1)), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) "0" ((USItype)(n0)) : "%g1", "cc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define UDIV_NEEDS_NORMALIZATION 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define abort() \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #ifdef __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define __BYTE_ORDER __BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define __BYTE_ORDER __LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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