^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* ld script for sparc32/sparc64 kernel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <asm-generic/vmlinux.lds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifdef CONFIG_SPARC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define INITIAL_ADDRESS 0x10000 + SIZEOF_HEADERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define TEXTSTART 0xf0004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SMP_CACHE_BYTES_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define SMP_CACHE_BYTES_SHIFT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define INITIAL_ADDRESS 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TEXTSTART 0x0000000000404000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #ifdef CONFIG_SPARC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) OUTPUT_FORMAT("elf32-sparc", "elf32-sparc", "elf32-sparc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) OUTPUT_ARCH(sparc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ENTRY(_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) jiffies = jiffies_64 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* sparc64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) OUTPUT_FORMAT("elf64-sparc", "elf64-sparc", "elf64-sparc")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) OUTPUT_ARCH(sparc:v9a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ENTRY(_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) jiffies = jiffies_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #ifdef CONFIG_SPARC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) SECTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #ifdef CONFIG_SPARC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) swapper_pg_dir = 0x0000000000402000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) . = INITIAL_ADDRESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .text TEXTSTART :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) _text = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) HEAD_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) TEXT_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) SCHED_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) CPUIDLE_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) LOCK_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) KPROBES_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) IRQENTRY_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) SOFTIRQENTRY_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *(.gnu.warning)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) } = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) _etext = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) RO_DATA(PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Start of data section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) _sdata = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .data1 : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *(.data1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) RW_DATA(SMP_CACHE_BYTES, 0, THREAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* End of data section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) _edata = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .fixup : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) __start___fixup = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *(.fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) __stop___fixup = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) EXCEPTION_TABLE(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) __init_begin = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) INIT_TEXT_SECTION(PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) __init_text_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) INIT_DATA_SECTION(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) . = ALIGN(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .tsb_ldquad_phys_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) __tsb_ldquad_phys_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) *(.tsb_ldquad_phys_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __tsb_ldquad_phys_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .tsb_phys_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) __tsb_phys_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) *(.tsb_phys_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) __tsb_phys_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .cpuid_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) __cpuid_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *(.cpuid_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) __cpuid_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .sun4v_1insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) __sun4v_1insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) *(.sun4v_1insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) __sun4v_1insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .sun4v_2insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) __sun4v_2insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *(.sun4v_2insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) __sun4v_2insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .leon_1insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __leon_1insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *(.leon_1insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) __leon_1insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .swapper_tsb_phys_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) __swapper_tsb_phys_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) *(.swapper_tsb_phys_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) __swapper_tsb_phys_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .swapper_4m_tsb_phys_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) __swapper_4m_tsb_phys_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *(.swapper_4m_tsb_phys_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) __swapper_4m_tsb_phys_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .popc_3insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) __popc_3insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) *(.popc_3insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) __popc_3insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .popc_6insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) __popc_6insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) *(.popc_6insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) __popc_6insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .pause_3insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) __pause_3insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) *(.pause_3insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) __pause_3insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .sun_m7_1insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) __sun_m7_1insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) *(.sun_m7_1insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) __sun_m7_1insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .sun_m7_2insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __sun_m7_2insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) *(.sun_m7_2insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) __sun_m7_2insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .get_tick_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) __get_tick_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) *(.get_tick_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) __get_tick_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .pud_huge_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) __pud_huge_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *(.pud_huge_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) __pud_huge_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .fast_win_ctrl_1insn_patch : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) __fast_win_ctrl_1insn_patch = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) *(.fast_win_ctrl_1insn_patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) __fast_win_ctrl_1insn_patch_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) PERCPU_SECTION(SMP_CACHE_BYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .exit.text : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) EXIT_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .exit.data : {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) EXIT_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) __init_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) BSS_SECTION(0, 0, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) _end = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) STABS_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DWARF_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ELF_DETAILS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DISCARDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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