^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * User-space Probes (UProbes) for sparc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Oracle Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Jose E. Marchesi <jose.marchesi@oracle.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Eric Saint Etienne <eric.saint.etienne@oracle.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/uprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/sched.h> /* For struct task_struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/kdebug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Compute the address of the breakpoint instruction and return it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Note that uprobe_get_swbp_addr is defined as a weak symbol in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * kernel/events/uprobe.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned long uprobe_get_swbp_addr(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) return instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void copy_to_page(struct page *page, unsigned long vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) const void *src, int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void *kaddr = kmap_atomic(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) memcpy(kaddr + (vaddr & ~PAGE_MASK), src, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) kunmap_atomic(kaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Fill in the xol area with the probed instruction followed by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * single-step trap. Some fixups in the copied instruction are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * performed at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Note that uprobe_xol_copy is defined as a weak symbol in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * kernel/events/uprobe.c.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void *src, unsigned long len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) const u32 stp_insn = UPROBE_STP_INSN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 insn = *(u32 *) src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Branches annulling their delay slot must be fixed to not do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * so. Clearing the annul bit on these instructions we can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * sure the single-step breakpoint in the XOL slot will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * executed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 op = (insn >> 30) & 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 op2 = (insn >> 22) & 0x7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (op == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) (op2 == 1 || op2 == 2 || op2 == 3 || op2 == 5 || op2 == 6) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) (insn & ANNUL_BIT) == ANNUL_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) insn &= ~ANNUL_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) copy_to_page(page, vaddr, &insn, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) copy_to_page(page, vaddr+len, &stp_insn, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Instruction analysis/validity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * This function returns 0 on success or a -ve number on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int arch_uprobe_analyze_insn(struct arch_uprobe *auprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct mm_struct *mm, unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Any unsupported instruction? Then return -EINVAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* If INSN is a relative control transfer instruction, return the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * corrected branch destination value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * Note that regs->tpc and regs->tnpc still hold the values of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * program counters at the time of the single-step trap due to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * execution of the UPROBE_STP_INSN at utask->xol_vaddr + 4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static unsigned long relbranch_fixup(u32 insn, struct uprobe_task *utask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Branch not taken, no mods necessary. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (regs->tnpc == regs->tpc + 0x4UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return utask->autask.saved_tnpc + 0x4UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* The three cases are call, branch w/prediction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * and traditional branch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if ((insn & 0xc0000000) == 0x40000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) (insn & 0xc1c00000) == 0x00400000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) (insn & 0xc1c00000) == 0x00800000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned long real_pc = (unsigned long) utask->vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned long ixol_addr = utask->xol_vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* The instruction did all the work for us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * already, just apply the offset to the correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * instruction location.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return (real_pc + (regs->tnpc - ixol_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* It is jmpl or some other absolute PC modification instruction,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * leave NPC as-is.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return regs->tnpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* If INSN is an instruction which writes its PC location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * into a destination register, fix that up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int retpc_fixup(struct pt_regs *regs, u32 insn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long real_pc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned long *slot = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Simplest case is 'call', which always uses %o7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if ((insn & 0xc0000000) == 0x40000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) slot = ®s->u_regs[UREG_I7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* 'jmpl' encodes the register inside of the opcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if ((insn & 0xc1f80000) == 0x81c00000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned long rd = ((insn >> 25) & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) if (rd <= 15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) slot = ®s->u_regs[rd];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned long fp = regs->u_regs[UREG_FP];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Hard case, it goes onto the stack. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) flushw_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) rd -= 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (test_thread_64bit_stack(fp)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned long __user *uslot =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) (unsigned long __user *) (fp + STACK_BIAS) + rd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) rc = __put_user(real_pc, uslot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) unsigned int __user *uslot = (unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) __user *) fp + rd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) rc = __put_user((u32) real_pc, uslot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (slot != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) *slot = real_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Single-stepping can be avoided for certain instructions: NOPs and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * instructions that can be emulated. This function determines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * whether the instruction where the uprobe is installed falls in one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * of these cases and emulates it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * This function returns true if the single-stepping can be skipped,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * false otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* We currently only emulate NOP instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if (auprobe->ixol == (1 << 24)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) regs->tnpc += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) regs->tpc += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Prepare to execute out of line. At this point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * current->utask->xol_vaddr points to an allocated XOL slot properly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * initialized with the original instruction and the single-stepping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * trap instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * This function returns 0 on success, any other number on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int arch_uprobe_pre_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct uprobe_task *utask = current->utask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct arch_uprobe_task *autask = ¤t->utask->autask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /* Save the current program counters so they can be restored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * later.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) autask->saved_tpc = regs->tpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) autask->saved_tnpc = regs->tnpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* Adjust PC and NPC so the first instruction in the XOL slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * will be executed by the user task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) instruction_pointer_set(regs, utask->xol_vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* Prepare to resume execution after the single-step. Called after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * single-stepping. To avoid the SMP problems that can occur when we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * temporarily put back the original opcode to single-step, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * single-stepped a copy of the instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * This function returns 0 on success, any other number on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct uprobe_task *utask = current->utask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct arch_uprobe_task *autask = &utask->autask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) u32 insn = auprobe->ixol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int rc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (utask->state == UTASK_SSTEP_ACK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) regs->tnpc = relbranch_fixup(insn, utask, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) regs->tpc = autask->saved_tnpc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) rc = retpc_fixup(regs, insn, (unsigned long) utask->vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) regs->tnpc = utask->vaddr+4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) regs->tpc = autask->saved_tnpc+4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* Handler for uprobe traps. This is called from the traps table and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * triggers the proper die notification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) asmlinkage void uprobe_trap(struct pt_regs *regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) unsigned long trap_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) BUG_ON(trap_level != 0x173 && trap_level != 0x174);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* We are only interested in user-mode code. Uprobe traps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * shall not be present in kernel code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (!user_mode(regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) bad_trap(regs, trap_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* trap_level == 0x173 --> ta 0x73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * trap_level == 0x174 --> ta 0x74
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (notify_die((trap_level == 0x173) ? DIE_BPT : DIE_SSTEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) (trap_level == 0x173) ? "bpt" : "sstep",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) bad_trap(regs, trap_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* Callback routine for handling die notifications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) int arch_uprobe_exception_notify(struct notifier_block *self,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) unsigned long val, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) int ret = NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct die_args *args = (struct die_args *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* We are only interested in userspace traps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (args->regs && !user_mode(args->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) case DIE_BPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (uprobe_pre_sstep_notifier(args->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ret = NOTIFY_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) case DIE_SSTEP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (uprobe_post_sstep_notifier(args->regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ret = NOTIFY_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* This function gets called when a XOL instruction either gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * trapped or the thread has a fatal signal, so reset the instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) * pointer to its probed address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct uprobe_task *utask = current->utask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) instruction_pointer_set(regs, utask->vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* If xol insn itself traps and generates a signal(Say,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * SIGILL/SIGSEGV/etc), then detect the case where a singlestepped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * instruction jumps back to its own address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) bool arch_uprobe_xol_was_trapped(struct task_struct *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) unsigned long orig_ret_vaddr = regs->u_regs[UREG_I7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) regs->u_regs[UREG_I7] = trampoline_vaddr-8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return orig_ret_vaddr + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }