Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * trampoline.S: Jump start slave processors on sparc64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/head.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <asm/lsu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/dcr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <asm/dcu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/pstate.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/spitfire.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/hypervisor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/cpudata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	.data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	.align	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) call_method:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	.asciz	"call-method"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	.align	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) itlb_load:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	.asciz	"SUNW,itlb-load"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	.align	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) dtlb_load:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	.asciz	"SUNW,dtlb-load"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define TRAMP_STACK_SIZE	1024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	.align	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) tramp_stack:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	.skip	TRAMP_STACK_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	.align		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	.globl		sparc64_cpu_startup, sparc64_cpu_startup_end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) sparc64_cpu_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	BRANCH_IF_SUN4V(g1, niagara_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	BRANCH_IF_CHEETAH_BASE(g1, g5, cheetah_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(g1, g5, cheetah_plus_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	ba,pt	%xcc, spitfire_startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) cheetah_plus_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	/* Preserve OBP chosen DCU and DCR register settings.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	ba,pt	%xcc, cheetah_generic_startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) cheetah_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	mov	DCR_BPE | DCR_RPE | DCR_SI | DCR_IFPOE | DCR_MS, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	wr	%g1, %asr18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	sethi	%uhi(DCU_ME|DCU_RE|DCU_HPE|DCU_SPE|DCU_SL|DCU_WE), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	or	%g5, %ulo(DCU_ME|DCU_RE|DCU_HPE|DCU_SPE|DCU_SL|DCU_WE), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	sllx	%g5, 32, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	or	%g5, DCU_DM | DCU_IM | DCU_DC | DCU_IC, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	stxa	%g5, [%g0] ASI_DCU_CONTROL_REG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	membar	#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	/* fallthru */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) cheetah_generic_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	mov	TSB_EXTENSION_P, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	stxa	%g0, [%g3] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	stxa	%g0, [%g3] ASI_IMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	membar	#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	mov	TSB_EXTENSION_S, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	stxa	%g0, [%g3] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	membar	#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	mov	TSB_EXTENSION_N, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	stxa	%g0, [%g3] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	stxa	%g0, [%g3] ASI_IMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	membar	#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* fallthru */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) niagara_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	/* Disable STICK_INT interrupts. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	sethi		%hi(0x80000000), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	sllx		%g5, 32, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	wr		%g5, %asr25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	ba,pt		%xcc, startup_continue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) spitfire_startup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	mov		(LSU_CONTROL_IC | LSU_CONTROL_DC | LSU_CONTROL_IM | LSU_CONTROL_DM), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	stxa		%g1, [%g0] ASI_LSU_CONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	membar		#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) startup_continue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	mov		%o0, %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	BRANCH_IF_SUN4V(g1, niagara_lock_tlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	sethi		%hi(0x80000000), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	sllx		%g2, 32, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	wr		%g2, 0, %tick_cmpr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	/* Call OBP by hand to lock KERNBASE into i/d tlbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	 * We lock 'num_kernel_image_mappings' consequetive entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	sethi		%hi(prom_entry_lock), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 1:	ldstub		[%g2 + %lo(prom_entry_lock)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	brnz,pn		%g1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* Get onto temporary stack which will be in the locked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 * kernel image.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	sethi		%hi(tramp_stack), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	or		%g1, %lo(tramp_stack), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	add		%g1, TRAMP_STACK_SIZE, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	sub		%g1, STACKFRAME_SZ + STACK_BIAS + 256, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	flushw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	/* Setup the loop variables:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	 * %l3: VADDR base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	 * %l4: TTE base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * %l5: Loop iterator, iterates from 0 to 'num_kernel_image_mappings'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 * %l6: Number of TTE entries to map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 * %l7: Highest TTE entry number, we count down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	sethi		%hi(KERNBASE), %l3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	sethi		%hi(kern_locked_tte_data), %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	ldx		[%l4 + %lo(kern_locked_tte_data)], %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	clr		%l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	sethi		%hi(num_kernel_image_mappings), %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	lduw		[%l6 + %lo(num_kernel_image_mappings)], %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	mov		15, %l7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	BRANCH_IF_ANY_CHEETAH(g1,g5,2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	mov		63, %l7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	/* Lock into I-MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	sethi		%hi(call_method), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	or		%g2, %lo(call_method), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	stx		%g2, [%sp + 2047 + 128 + 0x00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	mov		5, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	stx		%g2, [%sp + 2047 + 128 + 0x08]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	mov		1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	stx		%g2, [%sp + 2047 + 128 + 0x10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	sethi		%hi(itlb_load), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	or		%g2, %lo(itlb_load), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	stx		%g2, [%sp + 2047 + 128 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	sethi		%hi(prom_mmu_ihandle_cache), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	lduw		[%g2 + %lo(prom_mmu_ihandle_cache)], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	stx		%g2, [%sp + 2047 + 128 + 0x20]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	/* Each TTE maps 4MB, convert index to offset.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	sllx		%l5, 22, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	add		%l3, %g1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	stx		%g2, [%sp + 2047 + 128 + 0x28]	! VADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	add		%l4, %g1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	stx		%g2, [%sp + 2047 + 128 + 0x30]	! TTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	/* TTE index is highest minus loop index.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	sub		%l7, %l5, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	stx		%g2, [%sp + 2047 + 128 + 0x38]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	sethi		%hi(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	or		%g2, %lo(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	ldx		[%g2 + 0x08], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	call		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	 add		%sp, (2047 + 128), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	/* Lock into D-MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	sethi		%hi(call_method), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	or		%g2, %lo(call_method), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	stx		%g2, [%sp + 2047 + 128 + 0x00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	mov		5, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	stx		%g2, [%sp + 2047 + 128 + 0x08]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	mov		1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	stx		%g2, [%sp + 2047 + 128 + 0x10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	sethi		%hi(dtlb_load), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	or		%g2, %lo(dtlb_load), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	stx		%g2, [%sp + 2047 + 128 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	sethi		%hi(prom_mmu_ihandle_cache), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	lduw		[%g2 + %lo(prom_mmu_ihandle_cache)], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	stx		%g2, [%sp + 2047 + 128 + 0x20]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	/* Each TTE maps 4MB, convert index to offset.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	sllx		%l5, 22, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	add		%l3, %g1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	stx		%g2, [%sp + 2047 + 128 + 0x28]	! VADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	add		%l4, %g1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	stx		%g2, [%sp + 2047 + 128 + 0x30]	! TTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	/* TTE index is highest minus loop index.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	sub		%l7, %l5, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	stx		%g2, [%sp + 2047 + 128 + 0x38]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	sethi		%hi(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	or		%g2, %lo(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	ldx		[%g2 + 0x08], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	call		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	 add		%sp, (2047 + 128), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	add		%l5, 1, %l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	cmp		%l5, %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	bne,pt		%xcc, 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	sethi		%hi(prom_entry_lock), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	stb		%g0, [%g2 + %lo(prom_entry_lock)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	ba,pt		%xcc, after_lock_tlb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) niagara_lock_tlb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	sethi		%hi(KERNBASE), %l3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	sethi		%hi(kern_locked_tte_data), %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	ldx		[%l4 + %lo(kern_locked_tte_data)], %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	clr		%l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	sethi		%hi(num_kernel_image_mappings), %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	lduw		[%l6 + %lo(num_kernel_image_mappings)], %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	mov		HV_FAST_MMU_MAP_PERM_ADDR, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	sllx		%l5, 22, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	add		%l3, %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	clr		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	add		%l4, %g2, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	mov		HV_MMU_IMMU, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	ta		HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	mov		HV_FAST_MMU_MAP_PERM_ADDR, %o5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	sllx		%l5, 22, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	add		%l3, %g2, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	clr		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	add		%l4, %g2, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	mov		HV_MMU_DMMU, %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	ta		HV_FAST_TRAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	add		%l5, 1, %l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	cmp		%l5, %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	bne,pt		%xcc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) after_lock_tlb:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	wrpr		%g0, (PSTATE_PRIV | PSTATE_PEF), %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	wr		%g0, 0, %fprs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	wr		%g0, ASI_P, %asi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	mov		PRIMARY_CONTEXT, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 661:	stxa		%g0, [%g7] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	.section	.sun4v_1insn_patch, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	.word		661b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	stxa		%g0, [%g7] ASI_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	.previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	membar		#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	mov		SECONDARY_CONTEXT, %g7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 661:	stxa		%g0, [%g7] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	.section	.sun4v_1insn_patch, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	.word		661b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	stxa		%g0, [%g7] ASI_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	.previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	membar		#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	/* Everything we do here, until we properly take over the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	 * trap table, must be done with extreme care.  We cannot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	 * make any references to %g6 (current thread pointer),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	 * %g4 (current task pointer), or %g5 (base of current cpu's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	 * per-cpu area) until we properly take over the trap table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	 * from the firmware and hypervisor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	 * Get onto temporary stack which is in the locked kernel image.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	sethi		%hi(tramp_stack), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	or		%g1, %lo(tramp_stack), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	add		%g1, TRAMP_STACK_SIZE, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	sub		%g1, STACKFRAME_SZ + STACK_BIAS + 256, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	mov		0, %fp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	/* Put garbage in these registers to trap any access to them.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	set		0xdeadbeef, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	set		0xdeadbeef, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	set		0xdeadbeef, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	call		init_irqwork_curcpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	sethi		%hi(tlb_type), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	lduw		[%g3 + %lo(tlb_type)], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	cmp		%g2, 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	bne,pt		%icc, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	call		hard_smp_processor_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	call		sun4v_register_mondo_queues
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 1:	call		init_cur_cpu_trap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	 ldx		[%l0], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	/* Start using proper page size encodings in ctx register.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	sethi		%hi(sparc64_kern_pri_context), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	ldx		[%g3 + %lo(sparc64_kern_pri_context)], %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	mov		PRIMARY_CONTEXT, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 661:	stxa		%g2, [%g1] ASI_DMMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	.section	.sun4v_1insn_patch, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	.word		661b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	stxa		%g2, [%g1] ASI_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	.previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	membar		#Sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	wrpr		%g0, 0, %wstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	sethi		%hi(prom_entry_lock), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 1:	ldstub		[%g2 + %lo(prom_entry_lock)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	brnz,pn		%g1, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	/* As a hack, put &init_thread_union into %g6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	 * prom_world() loads from here to restore the %asi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	 * register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	sethi		%hi(init_thread_union), %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	or		%g6, %lo(init_thread_union), %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	sethi		%hi(is_sun4v), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	lduw		[%o0 + %lo(is_sun4v)], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	brz,pt		%o0, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	TRAP_LOAD_TRAP_BLOCK(%g2, %g3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	add		%g2, TRAP_PER_CPU_FAULT_INFO, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	stxa		%g2, [%g0] ASI_SCRATCHPAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	/* Compute physical address:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	 * paddr = kern_base + (mmfsa_vaddr - KERNBASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	sethi		%hi(KERNBASE), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	sub		%g2, %g3, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	sethi		%hi(kern_base), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	ldx		[%g3 + %lo(kern_base)], %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	add		%g2, %g3, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	sethi		%hi(sparc64_ttable_tl0), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	set		prom_set_trap_table_name, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	stx		%g2, [%sp + 2047 + 128 + 0x00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	mov		2, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	stx		%g2, [%sp + 2047 + 128 + 0x08]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	mov		0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	stx		%g2, [%sp + 2047 + 128 + 0x10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	stx		%o0, [%sp + 2047 + 128 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	stx		%o1, [%sp + 2047 + 128 + 0x20]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	sethi		%hi(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	or		%g2, %lo(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	ldx		[%g2 + 0x08], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	call		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	 add		%sp, (2047 + 128), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	ba,pt		%xcc, 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 2:	sethi		%hi(sparc64_ttable_tl0), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	set		prom_set_trap_table_name, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	stx		%g2, [%sp + 2047 + 128 + 0x00]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	mov		1, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	stx		%g2, [%sp + 2047 + 128 + 0x08]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	mov		0, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	stx		%g2, [%sp + 2047 + 128 + 0x10]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	stx		%o0, [%sp + 2047 + 128 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	sethi		%hi(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	or		%g2, %lo(p1275buf), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	ldx		[%g2 + 0x08], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	call		%o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	 add		%sp, (2047 + 128), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 3:	sethi		%hi(prom_entry_lock), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	stb		%g0, [%g2 + %lo(prom_entry_lock)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	ldx		[%l0], %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	ldx		[%g6 + TI_TASK], %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	mov		1, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	sllx		%g5, THREAD_SHIFT, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	sub		%g5, (STACKFRAME_SZ + STACK_BIAS), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	add		%g6, %g5, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	rdpr		%pstate, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	or		%o1, PSTATE_IE, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	wrpr		%o1, 0, %pstate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	call		smp_callin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	call		cpu_panic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	 nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 1:	b,a,pt		%xcc, 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	.align		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) sparc64_cpu_startup_end: