Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* time.c: UltraSparc timer and TOD clock support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Based largely on code which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/mc146818rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/profile.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/bcd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/cpufreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/rtc/m48t59.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #include <linux/ftrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/oplib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #include <asm/starfire.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #include <asm/cpudata.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #include <asm/irq_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #include "entry.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #include "kernel.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) DEFINE_SPINLOCK(rtc_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) unsigned long profile_pc(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	unsigned long pc = instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (in_lock_functions(pc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		return regs->u_regs[UREG_RETPC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	return pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) EXPORT_SYMBOL(profile_pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) static void tick_disable_protection(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	/* Set things up so user can access tick register for profiling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	 * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	 * read back of %tick after writing it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	"	ba,pt	%%xcc, 1f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	"	 nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	"	.align	64\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	"1:	rd	%%tick, %%g2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	"	add	%%g2, 6, %%g2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	"	andn	%%g2, %0, %%g2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	"	wrpr	%%g2, 0, %%tick\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	"	rdpr	%%tick, %%g0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	: /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	: "r" (TICK_PRIV_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	: "g2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static void tick_disable_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	"	ba,pt	%%xcc, 1f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	"	 nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	"	.align	64\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	"1:	wr	%0, 0x0, %%tick_cmpr\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	"	rd	%%tick_cmpr, %%g0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	: /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	: "r" (TICKCMP_IRQ_BIT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static void tick_init_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	tick_disable_protection();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	tick_disable_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static unsigned long long tick_get_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	unsigned long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	__asm__ __volatile__("rd	%%tick, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 			     "mov	%0, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 			     : "=r" (ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return ret & ~TICK_PRIV_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int tick_add_compare(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	unsigned long orig_tick, new_tick, new_compare;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	__asm__ __volatile__("rd	%%tick, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 			     : "=r" (orig_tick));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	orig_tick &= ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	/* Workaround for Spitfire Errata (#54 I think??), I discovered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	 * number 103640.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	 * On Blackbird writes to %tick_cmpr can fail, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	 * workaround seems to be to execute the wr instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	 * at the start of an I-cache line, and perform a dummy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	 * read back from %tick_cmpr right after writing to it. -DaveM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	__asm__ __volatile__("ba,pt	%%xcc, 1f\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 			     " add	%1, %2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 			     ".align	64\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 			     "1:\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			     "wr	%0, 0, %%tick_cmpr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			     "rd	%%tick_cmpr, %%g0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 			     : "=r" (new_compare)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 			     : "r" (orig_tick), "r" (adj));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	__asm__ __volatile__("rd	%%tick, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 			     : "=r" (new_tick));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	new_tick &= ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	return ((long)(new_tick - (orig_tick+adj))) > 0L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static unsigned long tick_add_tick(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	unsigned long new_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/* Also need to handle Blackbird bug here too. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	__asm__ __volatile__("rd	%%tick, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 			     "add	%0, %1, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			     "wrpr	%0, 0, %%tick\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			     : "=&r" (new_tick)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 			     : "r" (adj));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	return new_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* Searches for cpu clock frequency with given cpuid in OpenBoot tree */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static unsigned long cpuid_to_freq(phandle node, int cpuid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	bool is_cpu_node = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	unsigned long freq = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	char type[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	if (!node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		return freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	if (prom_getproperty(node, "device_type", type, sizeof(type)) != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		is_cpu_node = (strcmp(type, "cpu") == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	/* try upa-portid then cpuid to get cpuid, see prom_64.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (is_cpu_node && (prom_getint(node, "upa-portid") == cpuid ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 			    prom_getint(node, "cpuid") == cpuid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		freq = prom_getintdefault(node, "clock-frequency", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (!freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		freq = cpuid_to_freq(prom_getchild(node), cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (!freq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		freq = cpuid_to_freq(prom_getsibling(node), cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	return freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static unsigned long tick_get_frequency(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	return cpuid_to_freq(prom_root_node, hard_smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static struct sparc64_tick_ops tick_operations __cacheline_aligned = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	.name		=	"tick",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	.init_tick	=	tick_init_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	.disable_irq	=	tick_disable_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	.get_tick	=	tick_get_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	.add_tick	=	tick_add_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	.add_compare	=	tick_add_compare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	.get_frequency	=	tick_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	.softint_mask	=	1UL << 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) EXPORT_SYMBOL(tick_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static void stick_disable_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	"wr	%0, 0x0, %%asr25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	: /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	: "r" (TICKCMP_IRQ_BIT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) static void stick_init_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	/* Writes to the %tick and %stick register are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	 * allowed on sun4v.  The Hypervisor controls that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	 * bit, per-strand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	if (tlb_type != hypervisor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		tick_disable_protection();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		tick_disable_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		/* Let the user get at STICK too. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		"	rd	%%asr24, %%g2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		"	andn	%%g2, %0, %%g2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		"	wr	%%g2, 0, %%asr24"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		: /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		: "r" (TICK_PRIV_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		: "g1", "g2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	stick_disable_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static unsigned long long stick_get_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	unsigned long ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	__asm__ __volatile__("rd	%%asr24, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			     : "=r" (ret));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	return ret & ~TICK_PRIV_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static unsigned long stick_add_tick(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	unsigned long new_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	__asm__ __volatile__("rd	%%asr24, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 			     "add	%0, %1, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 			     "wr	%0, 0, %%asr24\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 			     : "=&r" (new_tick)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 			     : "r" (adj));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	return new_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) static int stick_add_compare(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	unsigned long orig_tick, new_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	__asm__ __volatile__("rd	%%asr24, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			     : "=r" (orig_tick));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	orig_tick &= ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	__asm__ __volatile__("wr	%0, 0, %%asr25"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 			     : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 			     : "r" (orig_tick + adj));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	__asm__ __volatile__("rd	%%asr24, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 			     : "=r" (new_tick));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	new_tick &= ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	return ((long)(new_tick - (orig_tick+adj))) > 0L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static unsigned long stick_get_frequency(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	return prom_getintdefault(prom_root_node, "stick-frequency", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static struct sparc64_tick_ops stick_operations __read_mostly = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.name		=	"stick",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.init_tick	=	stick_init_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	.disable_irq	=	stick_disable_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	.get_tick	=	stick_get_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	.add_tick	=	stick_add_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.add_compare	=	stick_add_compare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	.get_frequency	=	stick_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	.softint_mask	=	1UL << 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* On Hummingbird the STICK/STICK_CMPR register is implemented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)  * in I/O space.  There are two 64-bit registers each, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)  * first holds the low 32-bits of the value and the second holds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)  * the high 32-bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)  * Since STICK is constantly updating, we have to access it carefully.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)  * The sequence we use to read is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)  * 1) read high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)  * 2) read low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)  * 3) read high again, if it rolled re-read both low and high again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)  * Writing STICK safely is also tricky:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)  * 1) write low to zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)  * 2) write high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)  * 3) write low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) static unsigned long __hbird_read_stick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	unsigned long ret, tmp1, tmp2, tmp3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	unsigned long addr = HBIRD_STICK_ADDR+8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	__asm__ __volatile__("ldxa	[%1] %5, %2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 			     "1:\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 			     "sub	%1, 0x8, %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 			     "ldxa	[%1] %5, %3\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 			     "add	%1, 0x8, %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 			     "ldxa	[%1] %5, %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			     "cmp	%4, %2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 			     "bne,a,pn	%%xcc, 1b\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			     " mov	%4, %2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 			     "sllx	%4, 32, %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			     "or	%3, %4, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			     : "=&r" (ret), "=&r" (addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			       "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			     : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static void __hbird_write_stick(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	unsigned long low = (val & 0xffffffffUL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	unsigned long high = (val >> 32UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	unsigned long addr = HBIRD_STICK_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	__asm__ __volatile__("stxa	%%g0, [%0] %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 			     "add	%0, 0x8, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			     "stxa	%3, [%0] %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 			     "sub	%0, 0x8, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 			     "stxa	%2, [%0] %4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 			     : "=&r" (addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 			     : "0" (addr), "r" (low), "r" (high),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 			       "i" (ASI_PHYS_BYPASS_EC_E));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static void __hbird_write_compare(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	unsigned long low = (val & 0xffffffffUL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	unsigned long high = (val >> 32UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	__asm__ __volatile__("stxa	%3, [%0] %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			     "sub	%0, 0x8, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			     "stxa	%2, [%0] %4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 			     : "=&r" (addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			     : "0" (addr), "r" (low), "r" (high),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			       "i" (ASI_PHYS_BYPASS_EC_E));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) static void hbtick_disable_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	__hbird_write_compare(TICKCMP_IRQ_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) static void hbtick_init_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	tick_disable_protection();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	/* XXX This seems to be necessary to 'jumpstart' Hummingbird
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	 * XXX into actually sending STICK interrupts.  I think because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	 * XXX of how we store %tick_cmpr in head.S this somehow resets the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	 * XXX {TICK + STICK} interrupt mux.  -DaveM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	__hbird_write_stick(__hbird_read_stick());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	hbtick_disable_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) static unsigned long long hbtick_get_tick(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	return __hbird_read_stick() & ~TICK_PRIV_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static unsigned long hbtick_add_tick(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	val = __hbird_read_stick() + adj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	__hbird_write_stick(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static int hbtick_add_compare(unsigned long adj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	unsigned long val = __hbird_read_stick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	unsigned long val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	val &= ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	val += adj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	__hbird_write_compare(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	return ((long)(val2 - val)) > 0L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static unsigned long hbtick_get_frequency(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	return prom_getintdefault(prom_root_node, "stick-frequency", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static struct sparc64_tick_ops hbtick_operations __read_mostly = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	.name		=	"hbtick",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 	.init_tick	=	hbtick_init_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	.disable_irq	=	hbtick_disable_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 	.get_tick	=	hbtick_get_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	.add_tick	=	hbtick_add_tick,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	.add_compare	=	hbtick_add_compare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	.get_frequency	=	hbtick_get_frequency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	.softint_mask	=	1UL << 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) unsigned long cmos_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) EXPORT_SYMBOL(cmos_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static struct resource rtc_cmos_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static struct platform_device rtc_cmos_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	.name		= "rtc_cmos",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	.resource	= &rtc_cmos_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) static int rtc_probe(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	printk(KERN_INFO "%pOF: RTC regs at 0x%llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	       op->dev.of_node, op->resource[0].start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	/* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	 * up a fake resource so that the probe works for all cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 	 * When the RTC is behind an ISA bus it will have IORESOURCE_IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	 * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	r = &rtc_cmos_resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 	r->flags = IORESOURCE_IO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	r->name = op->resource[0].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	r->start = op->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	r->end = op->resource[0].end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	cmos_regs = op->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	return platform_device_register(&rtc_cmos_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static const struct of_device_id rtc_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		.compatible = "m5819",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		.compatible = "isa-m5819p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 		.compatible = "isa-m5823p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 		.compatible = "ds1287",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) static struct platform_driver rtc_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) 	.probe		= rtc_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 		.of_match_table = rtc_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static struct platform_device rtc_bq4802_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	.name		= "rtc-bq4802",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static int bq4802_probe(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 	printk(KERN_INFO "%pOF: BQ4802 regs at 0x%llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 	       op->dev.of_node, op->resource[0].start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 	rtc_bq4802_device.resource = &op->resource[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 	return platform_device_register(&rtc_bq4802_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const struct of_device_id bq4802_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 		.name = "rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 		.compatible = "bq4802",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) static struct platform_driver bq4802_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 	.probe		= bq4802_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 		.name = "bq4802",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 		.of_match_table = bq4802_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 	struct platform_device *pdev = to_platform_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	void __iomem *regs = (void __iomem *) pdev->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 	return readb(regs + ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	struct platform_device *pdev = to_platform_device(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	void __iomem *regs = (void __iomem *) pdev->resource[0].start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	writeb(val, regs + ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static struct m48t59_plat_data m48t59_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) 	.read_byte	= mostek_read_byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 	.write_byte	= mostek_write_byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) static struct platform_device m48t59_rtc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) 	.name		= "rtc-m48t59",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) 	.id		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 	.num_resources	= 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 	.dev	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 		.platform_data = &m48t59_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static int mostek_probe(struct platform_device *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 	struct device_node *dp = op->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) 	/* On an Enterprise system there can be multiple mostek clocks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 	 * We should only match the one that is on the central FHC bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 	if (of_node_name_eq(dp->parent, "fhc") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 	    !of_node_name_eq(dp->parent->parent, "central"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) 	printk(KERN_INFO "%pOF: Mostek regs at 0x%llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 	       dp, op->resource[0].start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 	m48t59_rtc.resource = &op->resource[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) 	return platform_device_register(&m48t59_rtc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static const struct of_device_id mostek_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 		.name = "eeprom",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static struct platform_driver mostek_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 	.probe		= mostek_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) 	.driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 		.name = "mostek",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) 		.of_match_table = mostek_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) static struct platform_device rtc_sun4v_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) 	.name		= "rtc-sun4v",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) static struct platform_device rtc_starfire_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) 	.name		= "rtc-starfire",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) 	.id		= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) static int __init clock_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) 	if (this_is_starfire)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) 		return platform_device_register(&rtc_starfire_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) 	if (tlb_type == hypervisor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) 		return platform_device_register(&rtc_sun4v_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) 	(void) platform_driver_register(&rtc_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) 	(void) platform_driver_register(&mostek_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) 	(void) platform_driver_register(&bq4802_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* Must be after subsys_initcall() so that busses are probed.  Must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)  * be before device_initcall() because things like the RTC driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)  * need to see the clock registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) fs_initcall(clock_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* Return true if this is Hummingbird, aka Ultra-IIe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static bool is_hummingbird(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) 	unsigned long ver, manuf, impl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) 	__asm__ __volatile__ ("rdpr %%ver, %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) 			      : "=&r" (ver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) 	manuf = ((ver >> 48) & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 	impl = ((ver >> 32) & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) 	return (manuf == 0x17 && impl == 0x13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct freq_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) 	unsigned long clock_tick_ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) 	unsigned int ref_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) unsigned long sparc64_get_clock_tick(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) 	struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) 	if (ft->clock_tick_ref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) 		return ft->clock_tick_ref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) 	return cpu_data(cpu).clock_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) EXPORT_SYMBOL(sparc64_get_clock_tick);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) #ifdef CONFIG_CPU_FREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) 				    void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) 	struct cpufreq_freqs *freq = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) 	unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) 	struct freq_table *ft;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) 	for_each_cpu(cpu, freq->policy->cpus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) 		ft = &per_cpu(sparc64_freq_table, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) 		if (!ft->ref_freq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) 			ft->ref_freq = freq->old;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) 			ft->clock_tick_ref = cpu_data(cpu).clock_tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) 		if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) 		    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) 			cpu_data(cpu).clock_tick =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) 				cpufreq_scale(ft->clock_tick_ref, ft->ref_freq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 					      freq->new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static struct notifier_block sparc64_cpufreq_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) 	.notifier_call	= sparc64_cpufreq_notifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) static int __init register_sparc64_cpufreq_notifier(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) 	cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) 				  CPUFREQ_TRANSITION_NOTIFIER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) core_initcall(register_sparc64_cpufreq_notifier);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) #endif /* CONFIG_CPU_FREQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static int sparc64_next_event(unsigned long delta,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) 			      struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) 	return tick_operations.add_compare(delta) ? -ETIME : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) static int sparc64_timer_shutdown(struct clock_event_device *evt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) 	tick_operations.disable_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static struct clock_event_device sparc64_clockevent = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) 	.features		= CLOCK_EVT_FEAT_ONESHOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) 	.set_state_shutdown	= sparc64_timer_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) 	.set_next_event		= sparc64_next_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) 	.rating			= 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) 	.shift			= 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) 	.irq			= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) 	struct pt_regs *old_regs = set_irq_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) 	unsigned long tick_mask = tick_operations.softint_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) 	int cpu = smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) 	struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) 	clear_softint(tick_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) 	irq_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) 	local_cpu_data().irq0_irqs++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) 	kstat_incr_irq_this_cpu(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) 	if (unlikely(!evt->event_handler)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) 		printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) 		       "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 	} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) 		evt->event_handler(evt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) 	irq_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) 	set_irq_regs(old_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) void setup_sparc64_timer(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 	struct clock_event_device *sevt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) 	unsigned long pstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) 	/* Guarantee that the following sequences execute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 	 * uninterrupted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) 	__asm__ __volatile__("rdpr	%%pstate, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) 			     "wrpr	%0, %1, %%pstate"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) 			     : "=r" (pstate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) 			     : "i" (PSTATE_IE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) 	tick_operations.init_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) 	/* Restore PSTATE_IE. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) 	__asm__ __volatile__("wrpr	%0, 0x0, %%pstate"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) 			     : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) 			     : "r" (pstate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) 	sevt = this_cpu_ptr(&sparc64_events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 	memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) 	sevt->cpumask = cpumask_of(smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) 	clockevents_register_device(sevt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) #define SPARC64_NSEC_PER_CYC_SHIFT	10UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static struct clocksource clocksource_tick = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) 	.rating		= 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) 	.mask		= CLOCKSOURCE_MASK(64),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static unsigned long tb_ticks_per_usec __read_mostly;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) void __delay(unsigned long loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 	unsigned long bclock = get_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) 	while ((get_tick() - bclock) < loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) EXPORT_SYMBOL(__delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) void udelay(unsigned long usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) 	__delay(tb_ticks_per_usec * usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) EXPORT_SYMBOL(udelay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static u64 clocksource_tick_read(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) 	return get_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static void __init get_tick_patch(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) 	unsigned int *addr, *instr, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) 	struct get_tick_patch *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 	if (tlb_type == spitfire && is_hummingbird())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) 	for (p = &__get_tick_patch; p < &__get_tick_patch_end; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) 		instr = (tlb_type == spitfire) ? p->tick : p->stick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) 		addr = (unsigned int *)(unsigned long)p->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) 		for (i = 0; i < GET_TICK_NINSTR; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 			addr[i] = instr[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) 			/* ensure that address is modified before flush */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) 			wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) 			flushi(&addr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) static void __init init_tick_ops(struct sparc64_tick_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) 	unsigned long freq, quotient, tick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) 	freq = ops->get_frequency();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) 	quotient = clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) 	tick = ops->get_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) 	ops->offset = (tick * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) 	ops->ticks_per_nsec_quotient = quotient;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) 	ops->frequency = freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) 	tick_operations = *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) 	get_tick_patch();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) void __init time_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) 	if (tlb_type == spitfire) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 		if (is_hummingbird()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) 			init_tick_ops(&hbtick_operations);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) 			clocksource_tick.archdata.vclock_mode = VCLOCK_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) 			init_tick_ops(&tick_operations);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) 			clocksource_tick.archdata.vclock_mode = VCLOCK_TICK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) 		init_tick_ops(&stick_operations);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) 		clocksource_tick.archdata.vclock_mode = VCLOCK_STICK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) void __init time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) 	unsigned long freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) 	freq = tick_operations.frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) 	tb_ticks_per_usec = freq / USEC_PER_SEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) 	clocksource_tick.name = tick_operations.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) 	clocksource_tick.read = clocksource_tick_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) 	clocksource_register_hz(&clocksource_tick, freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) 	printk("clocksource: mult[%x] shift[%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) 	       clocksource_tick.mult, clocksource_tick.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) 	sparc64_clockevent.name = tick_operations.name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) 	clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) 	sparc64_clockevent.max_delta_ns =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) 		clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) 	sparc64_clockevent.max_delta_ticks = 0x7fffffffffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) 	sparc64_clockevent.min_delta_ns =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) 		clockevent_delta2ns(0xF, &sparc64_clockevent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) 	sparc64_clockevent.min_delta_ticks = 0xF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) 	printk("clockevent: mult[%x] shift[%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) 	       sparc64_clockevent.mult, sparc64_clockevent.shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) 	setup_sparc64_timer();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) unsigned long long sched_clock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) 	unsigned long quotient = tick_operations.ticks_per_nsec_quotient;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) 	unsigned long offset = tick_operations.offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) 	/* Use barrier so the compiler emits the loads first and overlaps load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) 	 * latency with reading tick, because reading %tick/%stick is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) 	 * post-sync instruction that will flush and restart subsequent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) 	 * instructions after it commits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) 	barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) 	return ((get_tick() * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT) - offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) int read_current_timer(unsigned long *timer_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) 	*timer_val = get_tick();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) }