Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* Sparc SS1000/SC2000 SMP support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Based on sun4m's smp.c, which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/clockchips.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/profile.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/sched/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/switch_to.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/oplib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/sbi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include "kernel.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include "irq.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define IRQ_CROSS_CALL		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static volatile int smp_processors_ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static int smp_highest_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static inline unsigned long sun4d_swap(volatile unsigned long *ptr, unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	__asm__ __volatile__("swap [%1], %0\n\t" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			     "=&r" (val), "=&r" (ptr) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 			     "0" (val), "1" (ptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static void smp4d_ipi_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static unsigned char cpu_leds[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) static inline void show_leds(int cpuid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	cpuid &= 0x1e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	__asm__ __volatile__ ("stba %0, [%1] %2" : :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 			      "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			      "r" (ECSR_BASE(cpuid) | BB_LEDS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 			      "i" (ASI_M_CTL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) void sun4d_cpu_pre_starting(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	int cpuid = hard_smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	/* Show we are alive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	cpu_leds[cpuid] = 0x6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	show_leds(cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	/* Enable level15 interrupt, disable level14 interrupt for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) void sun4d_cpu_pre_online(void *arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	int cpuid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	cpuid = hard_smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	/* Unblock the master CPU _only_ when the scheduler state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	 * of all secondary CPUs will be up-to-date, so after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	 * the SMP initialization the master will be just allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	 * to call the scheduler code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	sun4d_swap((unsigned long *)&cpu_callin_map[cpuid], 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	local_ops->tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	while ((unsigned long)current_set[cpuid] < PAGE_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	while (current_set[cpuid]->cpu != cpuid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	/* Fix idle thread fields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	__asm__ __volatile__("ld [%0], %%g6\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			     : : "r" (&current_set[cpuid])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			     : "memory" /* paranoid */);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	cpu_leds[cpuid] = 0x9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	show_leds(cpuid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	/* Attach to the address space of init_task. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	mmgrab(&init_mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	current->active_mm = &init_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	local_ops->tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	while (!cpumask_test_cpu(cpuid, &smp_commenced_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	spin_lock_irqsave(&sun4d_imsk_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  *	Cycle through the processors asking the PROM to start each one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) void __init smp4d_boot_cpus(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	smp4d_ipi_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	if (boot_cpu_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		current_set[0] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int smp4d_boot_one_cpu(int i, struct task_struct *idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	unsigned long *entry = &sun4d_cpu_startup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	int cpu_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	cpu_find_by_instance(i, &cpu_node, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	current_set[i] = task_thread_info(idle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	 * Initialize the contexts table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	 * Since the call to prom_startcpu() trashes the structure,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	 * we need to re-initialize it for each cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	smp_penguin_ctable.which_io = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	smp_penguin_ctable.reg_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	/* whirrr, whirrr, whirrrrrrrrr... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	printk(KERN_INFO "Starting CPU %d at %p\n", i, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	prom_startcpu(cpu_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		      &smp_penguin_ctable, 0, (char *)entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	printk(KERN_INFO "prom_startcpu returned :)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	/* wheee... it's going... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	for (timeout = 0; timeout < 10000; timeout++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		if (cpu_callin_map[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	if (!(cpu_callin_map[i])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		printk(KERN_ERR "Processor %d is stuck.\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) void __init smp4d_smp_done(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int i, first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int *prev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	/* setup cpu list for irq rotation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	first = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	prev = &first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	for_each_online_cpu(i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		*prev = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		prev = &cpu_data(i).next;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	*prev = first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	local_ops->cache_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	/* Ok, they are spinning and ready to go. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	smp_processors_ready = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	sun4d_distribute_irqs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* Memory structure giving interrupt handler information about IPI generated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct sun4d_ipi_work {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	int single;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	int msk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	int resched;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static DEFINE_PER_CPU_SHARED_ALIGNED(struct sun4d_ipi_work, sun4d_ipi_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* Initialize IPIs on the SUN4D SMP machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static void __init smp4d_ipi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct sun4d_ipi_work *work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	printk(KERN_INFO "smp4d: setup IPI at IRQ %d\n", SUN4D_IPI_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	for_each_possible_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		work = &per_cpu(sun4d_ipi_work, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		work->single = work->msk = work->resched = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void sun4d_ipi_interrupt(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	struct sun4d_ipi_work *work = this_cpu_ptr(&sun4d_ipi_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	if (work->single) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		work->single = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		smp_call_function_single_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	if (work->msk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		work->msk = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		smp_call_function_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	if (work->resched) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		work->resched = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		smp_resched_interrupt();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* +-------+-------------+-----------+------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)  * | bcast |  devid      |   sid     |              levels mask           |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)  * +-------+-------------+-----------+------------------------------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)  *  31      30         23 22       15 14                                 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define IGEN_MESSAGE(bcast, devid, sid, levels) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	(((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static void sun4d_send_ipi(int cpu, int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static void sun4d_ipi_single(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	/* Mark work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	work->single = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	/* Generate IRQ on the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void sun4d_ipi_mask_one(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	/* Mark work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	work->msk = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	/* Generate IRQ on the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static void sun4d_ipi_resched(int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct sun4d_ipi_work *work = &per_cpu(sun4d_ipi_work, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	/* Mark work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	work->resched = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	/* Generate IRQ on the CPU (any IRQ will cause resched) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	sun4d_send_ipi(cpu, SUN4D_IPI_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct smp_funcall {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	smpfunc_t func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	unsigned long arg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	unsigned long arg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	unsigned long arg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	unsigned long arg4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	unsigned long arg5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	unsigned char processors_in[NR_CPUS];  /* Set when ipi entered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) } ccall_info __attribute__((aligned(8)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static DEFINE_SPINLOCK(cross_call_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Cross calls must be serialized, at least currently. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static void sun4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 			     unsigned long arg2, unsigned long arg3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			     unsigned long arg4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (smp_processors_ready) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		register int high = smp_highest_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		spin_lock_irqsave(&cross_call_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 			 * If you make changes here, make sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 			 * gcc generates proper code...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			register smpfunc_t f asm("i0") = func;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			register unsigned long a1 asm("i1") = arg1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 			register unsigned long a2 asm("i2") = arg2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 			register unsigned long a3 asm("i3") = arg3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 			register unsigned long a4 asm("i4") = arg4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 			register unsigned long a5 asm("i5") = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 			__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 				"std %0, [%6]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 				"std %2, [%6 + 8]\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 				"std %4, [%6 + 16]\n\t" : :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 				"r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 				"r" (&ccall_info.func));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		/* Init receive/complete mapping, plus fire the IPI's off. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 			register int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 			cpumask_clear_cpu(smp_processor_id(), &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 			cpumask_and(&mask, cpu_online_mask, &mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 			for (i = 0; i <= high; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 				if (cpumask_test_cpu(i, &mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 					ccall_info.processors_in[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 					ccall_info.processors_out[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 					sun4d_send_ipi(i, IRQ_CROSS_CALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 				}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 			register int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 			i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 			do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 				if (!cpumask_test_cpu(i, &mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 					continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 				while (!ccall_info.processors_in[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 					barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 			} while (++i <= high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 			i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 			do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 				if (!cpumask_test_cpu(i, &mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 					continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 				while (!ccall_info.processors_out[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 					barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 			} while (++i <= high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		spin_unlock_irqrestore(&cross_call_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /* Running cross calls. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) void smp4d_cross_call_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	int i = hard_smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	ccall_info.processors_in[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 			ccall_info.arg4, ccall_info.arg5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	ccall_info.processors_out[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	struct pt_regs *old_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	int cpu = hard_smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	struct clock_event_device *ce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	static int cpu_tick[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	old_regs = set_irq_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	bw_get_prof_limit(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	bw_clear_intr_mask(0, 1);	/* INTR_TABLE[0] & 1 is Profile IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	cpu_tick[cpu]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	if (!(cpu_tick[cpu] & 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		if (cpu_tick[cpu] == 0x60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 			cpu_tick[cpu] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		show_leds(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	ce = &per_cpu(sparc32_clockevent, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	irq_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	ce->event_handler(ce);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	irq_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	set_irq_regs(old_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) static const struct sparc32_ipi_ops sun4d_ipi_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	.cross_call = sun4d_cross_call,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	.resched    = sun4d_ipi_resched,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	.single     = sun4d_ipi_single,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	.mask_one   = sun4d_ipi_mask_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) void __init sun4d_init_smp(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	/* Patch ipi15 trap table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	sparc32_ipi_ops = &sun4d_ipi_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	for (i = 0; i < NR_CPUS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 		ccall_info.processors_in[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 		ccall_info.processors_out[i] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }