^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _PSYCHO_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _PSYCHO_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /* U2P Programmer's Manual, page 13-55, configuration space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * address format:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * 32 24 23 16 15 11 10 8 7 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * ---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * |0 0 0 0 0 0 0 0 1| bus | device | function | reg | 0 0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PSYCHO_CONFIG_BASE(PBM) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ((PBM)->config_space | (1UL << 24))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PSYCHO_CONFIG_ENCODE(BUS, DEVFN, REG) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) (((unsigned long)(BUS) << 16) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ((unsigned long)(DEVFN) << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ((unsigned long)(REG)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static inline void *psycho_pci_config_mkaddr(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned char bus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned int devfn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int where)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) return (void *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) (PSYCHO_CONFIG_BASE(pbm) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PSYCHO_CONFIG_ENCODE(bus, devfn, where));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) enum psycho_error_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) UE_ERR, CE_ERR, PCI_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void psycho_check_iommu_error(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned long afsr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned long afar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) enum psycho_error_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) irqreturn_t psycho_pcierr_intr(int irq, void *dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int psycho_iommu_init(struct pci_pbm_info *pbm, int tsbsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 dvma_offset, u32 dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned long write_complete_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void psycho_pbm_init_common(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct platform_device *op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) const char *chip_name, int chip_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #endif /* _PSYCHO_COMMON_H */