^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* psycho_common.c: Code common to PSYCHO and derivative PCI controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/numa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/upa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "pci_impl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "iommu_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "psycho_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PSYCHO_STRBUF_CTRL_DENAB 0x0000000000000002ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PSYCHO_STCERR_WRITE 0x0000000000000002ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PSYCHO_STCERR_READ 0x0000000000000001ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PSYCHO_STCTAG_PPN 0x0fffffff00000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PSYCHO_STCTAG_VPN 0x00000000ffffe000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PSYCHO_STCTAG_VALID 0x0000000000000002ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PSYCHO_STCTAG_WRITE 0x0000000000000001ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PSYCHO_STCLINE_LINDX 0x0000000001e00000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PSYCHO_STCLINE_SPTR 0x00000000001f8000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PSYCHO_STCLINE_LADDR 0x0000000000007f00ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PSYCHO_STCLINE_EPTR 0x00000000000000fcULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PSYCHO_STCLINE_VALID 0x0000000000000002ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PSYCHO_STCLINE_FOFN 0x0000000000000001ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static DEFINE_SPINLOCK(stc_buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static unsigned long stc_error_buf[128];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static unsigned long stc_tag_buf[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static unsigned long stc_line_buf[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static void psycho_check_stc_error(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long err_base, tag_base, line_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct strbuf *strbuf = &pbm->stc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u64 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (!strbuf->strbuf_control)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) err_base = strbuf->strbuf_err_stat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) tag_base = strbuf->strbuf_tag_diag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) line_base = strbuf->strbuf_line_diag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) spin_lock(&stc_buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) /* This is __REALLY__ dangerous. When we put the streaming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * buffer into diagnostic mode to probe it's tags and error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * status, we _must_ clear all of the line tag valid bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * before re-enabling the streaming buffer. If any dirty data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * lives in the STC when we do this, we will end up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * invalidating it before it has a chance to reach main
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) control = upa_readq(strbuf->strbuf_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) upa_writeq(control | PSYCHO_STRBUF_CTRL_DENAB, strbuf->strbuf_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) for (i = 0; i < 128; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) val = upa_readq(err_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) upa_writeq(0UL, err_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) stc_error_buf[i] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) stc_tag_buf[i] = upa_readq(tag_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) stc_line_buf[i] = upa_readq(line_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) upa_writeq(0UL, tag_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) upa_writeq(0UL, line_base + (i * 8UL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* OK, state is logged, exit diagnostic mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) upa_writeq(control, strbuf->strbuf_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) int j, saw_error, first, last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) saw_error = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) first = i * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) last = first + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) for (j = first; j < last; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u64 errval = stc_error_buf[j];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (errval != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) saw_error++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) printk(KERN_ERR "%s: STC_ERR(%d)[wr(%d)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "rd(%d)]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) j,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) (errval & PSYCHO_STCERR_WRITE) ? 1 : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) (errval & PSYCHO_STCERR_READ) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (saw_error != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) u64 tagval = stc_tag_buf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u64 lineval = stc_line_buf[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) printk(KERN_ERR "%s: STC_TAG(%d)[PA(%016llx)VA(%08llx)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) "V(%d)W(%d)]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ((tagval & PSYCHO_STCTAG_PPN) >> 19UL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) (tagval & PSYCHO_STCTAG_VPN),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ((tagval & PSYCHO_STCTAG_VALID) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ((tagval & PSYCHO_STCTAG_WRITE) ? 1 : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) printk(KERN_ERR "%s: STC_LINE(%d)[LIDX(%llx)SP(%llx)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) "LADDR(%llx)EP(%llx)V(%d)FOFN(%d)]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ((lineval & PSYCHO_STCLINE_LINDX) >> 21UL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ((lineval & PSYCHO_STCLINE_SPTR) >> 15UL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ((lineval & PSYCHO_STCLINE_LADDR) >> 8UL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) ((lineval & PSYCHO_STCLINE_EPTR) >> 2UL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ((lineval & PSYCHO_STCLINE_VALID) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ((lineval & PSYCHO_STCLINE_FOFN) ? 1 : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) spin_unlock(&stc_buf_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define PSYCHO_IOMMU_TAG 0xa580UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define PSYCHO_IOMMU_DATA 0xa600UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static void psycho_record_iommu_tags_and_data(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) u64 *tag, u64 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned long base = pbm->controller_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned long off = i * 8UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) tag[i] = upa_readq(base + PSYCHO_IOMMU_TAG+off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) data[i] = upa_readq(base + PSYCHO_IOMMU_DATA+off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Now clear out the entry. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) upa_writeq(0, base + PSYCHO_IOMMU_TAG + off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) upa_writeq(0, base + PSYCHO_IOMMU_DATA + off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define PSYCHO_IOMMU_TAG_ERRSTS (0x3UL << 23UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define PSYCHO_IOMMU_TAG_ERR (0x1UL << 22UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define PSYCHO_IOMMU_TAG_WRITE (0x1UL << 21UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define PSYCHO_IOMMU_TAG_STREAM (0x1UL << 20UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define PSYCHO_IOMMU_TAG_SIZE (0x1UL << 19UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define PSYCHO_IOMMU_TAG_VPAGE 0x7ffffULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define PSYCHO_IOMMU_DATA_VALID (1UL << 30UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define PSYCHO_IOMMU_DATA_CACHE (1UL << 28UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define PSYCHO_IOMMU_DATA_PPAGE 0xfffffffULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static void psycho_dump_iommu_tags_and_data(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) u64 *tag, u64 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u64 tag_val, data_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) const char *type_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) tag_val = tag[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (!(tag_val & PSYCHO_IOMMU_TAG_ERR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) data_val = data[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) switch((tag_val & PSYCHO_IOMMU_TAG_ERRSTS) >> 23UL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) type_str = "Protection Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) type_str = "Invalid Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) type_str = "TimeOut Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) type_str = "ECC Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) printk(KERN_ERR "%s: IOMMU TAG(%d)[error(%s) wr(%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "str(%d) sz(%dK) vpg(%08llx)]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) pbm->name, i, type_str,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) ((tag_val & PSYCHO_IOMMU_TAG_WRITE) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) ((tag_val & PSYCHO_IOMMU_TAG_STREAM) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ((tag_val & PSYCHO_IOMMU_TAG_SIZE) ? 64 : 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) (tag_val & PSYCHO_IOMMU_TAG_VPAGE) << IOMMU_PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) printk(KERN_ERR "%s: IOMMU DATA(%d)[valid(%d) cache(%d) "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) "ppg(%016llx)]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pbm->name, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ((data_val & PSYCHO_IOMMU_DATA_VALID) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ((data_val & PSYCHO_IOMMU_DATA_CACHE) ? 1 : 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) (data_val & PSYCHO_IOMMU_DATA_PPAGE) << IOMMU_PAGE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define PSYCHO_IOMMU_CTRL_XLTESTAT 0x0000000006000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define PSYCHO_IOMMU_CTRL_XLTEERR 0x0000000001000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) void psycho_check_iommu_error(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) unsigned long afsr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) unsigned long afar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) enum psycho_error_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) u64 control, iommu_tag[16], iommu_data[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct iommu *iommu = pbm->iommu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) spin_lock_irqsave(&iommu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) control = upa_readq(iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (control & PSYCHO_IOMMU_CTRL_XLTEERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) const char *type_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) control &= ~PSYCHO_IOMMU_CTRL_XLTEERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) upa_writeq(control, iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) switch ((control & PSYCHO_IOMMU_CTRL_XLTESTAT) >> 25UL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) type_str = "Protection Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) type_str = "Invalid Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) type_str = "TimeOut Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) type_str = "ECC Error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) printk(KERN_ERR "%s: IOMMU Error, type[%s]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) pbm->name, type_str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* It is very possible for another DVMA to occur while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * we do this probe, and corrupt the system further.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * But we are so screwed at this point that we are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * likely to crash hard anyways, so get as much
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * diagnostic information to the console as we can.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) psycho_record_iommu_tags_and_data(pbm, iommu_tag, iommu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) psycho_dump_iommu_tags_and_data(pbm, iommu_tag, iommu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) psycho_check_stc_error(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) spin_unlock_irqrestore(&iommu->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #define PSYCHO_PCICTRL_SBH_ERR 0x0000000800000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define PSYCHO_PCICTRL_SERR 0x0000000400000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) irqreturn_t ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) u64 csr, csr_error_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) u16 stat, *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) csr = upa_readq(pbm->pci_csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) csr_error_bits = csr & (PSYCHO_PCICTRL_SBH_ERR | PSYCHO_PCICTRL_SERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (csr_error_bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Clear the errors. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) upa_writeq(csr, pbm->pci_csr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /* Log 'em. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (csr_error_bits & PSYCHO_PCICTRL_SBH_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) printk(KERN_ERR "%s: PCI streaming byte hole "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) "error asserted.\n", pbm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (csr_error_bits & PSYCHO_PCICTRL_SERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) printk(KERN_ERR "%s: PCI SERR signal asserted.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) pbm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) addr = psycho_pci_config_mkaddr(pbm, pbm->pci_first_busno,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 0, PCI_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) pci_config_read16(addr, &stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (stat & (PCI_STATUS_PARITY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) PCI_STATUS_SIG_TARGET_ABORT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) PCI_STATUS_REC_TARGET_ABORT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) PCI_STATUS_REC_MASTER_ABORT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) PCI_STATUS_SIG_SYSTEM_ERROR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) printk(KERN_ERR "%s: PCI bus error, PCI_STATUS[%04x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) pbm->name, stat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) pci_config_write16(addr, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ret = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define PSYCHO_PCIAFSR_PMA 0x8000000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define PSYCHO_PCIAFSR_PTA 0x4000000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define PSYCHO_PCIAFSR_PRTRY 0x2000000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define PSYCHO_PCIAFSR_PPERR 0x1000000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define PSYCHO_PCIAFSR_SMA 0x0800000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define PSYCHO_PCIAFSR_STA 0x0400000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) #define PSYCHO_PCIAFSR_SRTRY 0x0200000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define PSYCHO_PCIAFSR_SPERR 0x0100000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #define PSYCHO_PCIAFSR_RESV1 0x00ff000000000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define PSYCHO_PCIAFSR_BMSK 0x0000ffff00000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #define PSYCHO_PCIAFSR_BLK 0x0000000080000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #define PSYCHO_PCIAFSR_RESV2 0x0000000040000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define PSYCHO_PCIAFSR_MID 0x000000003e000000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define PSYCHO_PCIAFSR_RESV3 0x0000000001ffffffULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) irqreturn_t psycho_pcierr_intr(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct pci_pbm_info *pbm = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) u64 afsr, afar, error_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) int reported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) afsr = upa_readq(pbm->pci_afsr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) afar = upa_readq(pbm->pci_afar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) error_bits = afsr &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_PTA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) PSYCHO_PCIAFSR_PRTRY | PSYCHO_PCIAFSR_PPERR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) PSYCHO_PCIAFSR_SMA | PSYCHO_PCIAFSR_STA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) PSYCHO_PCIAFSR_SRTRY | PSYCHO_PCIAFSR_SPERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (!error_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return psycho_pcierr_intr_other(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) upa_writeq(error_bits, pbm->pci_afsr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) printk(KERN_ERR "%s: PCI Error, primary error type[%s]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) (((error_bits & PSYCHO_PCIAFSR_PMA) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) "Master Abort" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ((error_bits & PSYCHO_PCIAFSR_PTA) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) "Target Abort" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ((error_bits & PSYCHO_PCIAFSR_PRTRY) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) "Excessive Retries" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) ((error_bits & PSYCHO_PCIAFSR_PPERR) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) "Parity Error" : "???"))))));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) printk(KERN_ERR "%s: bytemask[%04llx] UPA_MID[%02llx] was_block(%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) (afsr & PSYCHO_PCIAFSR_BMSK) >> 32UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) (afsr & PSYCHO_PCIAFSR_MID) >> 25UL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) (afsr & PSYCHO_PCIAFSR_BLK) ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) printk(KERN_ERR "%s: PCI AFAR [%016llx]\n", pbm->name, afar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) printk(KERN_ERR "%s: PCI Secondary errors [", pbm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) reported = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (afsr & PSYCHO_PCIAFSR_SMA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) reported++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) printk("(Master Abort)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (afsr & PSYCHO_PCIAFSR_STA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) reported++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) printk("(Target Abort)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (afsr & PSYCHO_PCIAFSR_SRTRY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) reported++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) printk("(Excessive Retries)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) if (afsr & PSYCHO_PCIAFSR_SPERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) reported++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) printk("(Parity Error)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (!reported)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) printk("(none)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) printk("]\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (error_bits & (PSYCHO_PCIAFSR_PTA | PSYCHO_PCIAFSR_STA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) psycho_check_iommu_error(pbm, afsr, afar, PCI_ERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) pci_scan_for_target_abort(pbm, pbm->pci_bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (error_bits & (PSYCHO_PCIAFSR_PMA | PSYCHO_PCIAFSR_SMA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) pci_scan_for_master_abort(pbm, pbm->pci_bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (error_bits & (PSYCHO_PCIAFSR_PPERR | PSYCHO_PCIAFSR_SPERR))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) pci_scan_for_parity_error(pbm, pbm->pci_bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void psycho_iommu_flush(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) unsigned long off = i * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) upa_writeq(0, pbm->controller_regs + PSYCHO_IOMMU_TAG + off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) upa_writeq(0, pbm->controller_regs + PSYCHO_IOMMU_DATA + off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #define PSYCHO_IOMMU_CONTROL 0x0200UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) #define PSYCHO_IOMMU_CTRL_TSBSZ 0x0000000000070000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) #define PSYCHO_IOMMU_TSBSZ_1K 0x0000000000000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) #define PSYCHO_IOMMU_TSBSZ_2K 0x0000000000010000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) #define PSYCHO_IOMMU_TSBSZ_4K 0x0000000000020000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) #define PSYCHO_IOMMU_TSBSZ_8K 0x0000000000030000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) #define PSYCHO_IOMMU_TSBSZ_16K 0x0000000000040000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) #define PSYCHO_IOMMU_TSBSZ_32K 0x0000000000050000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) #define PSYCHO_IOMMU_TSBSZ_64K 0x0000000000060000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) #define PSYCHO_IOMMU_TSBSZ_128K 0x0000000000070000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) #define PSYCHO_IOMMU_CTRL_TBWSZ 0x0000000000000004UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define PSYCHO_IOMMU_CTRL_DENAB 0x0000000000000002UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define PSYCHO_IOMMU_CTRL_ENAB 0x0000000000000001UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define PSYCHO_IOMMU_FLUSH 0x0210UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define PSYCHO_IOMMU_TSBBASE 0x0208UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) int psycho_iommu_init(struct pci_pbm_info *pbm, int tsbsize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u32 dvma_offset, u32 dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) unsigned long write_complete_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct iommu *iommu = pbm->iommu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u64 control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) iommu->iommu_tags = pbm->controller_regs + PSYCHO_IOMMU_TAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) iommu->write_complete_reg = (pbm->controller_regs +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) write_complete_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) iommu->iommu_ctxflush = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) control = upa_readq(iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) control |= PSYCHO_IOMMU_CTRL_DENAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) upa_writeq(control, iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) psycho_iommu_flush(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /* Leave diag mode enabled for full-flushing done in pci_iommu.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) err = iommu_table_init(iommu, tsbsize * 1024 * 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) dvma_offset, dma_mask, pbm->numa_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) upa_writeq(__pa(iommu->page_table), iommu->iommu_tsbbase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) control = upa_readq(iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) control &= ~(PSYCHO_IOMMU_CTRL_TSBSZ | PSYCHO_IOMMU_CTRL_TBWSZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) control |= PSYCHO_IOMMU_CTRL_ENAB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) switch (tsbsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case 64:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) control |= PSYCHO_IOMMU_TSBSZ_64K;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) case 128:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) control |= PSYCHO_IOMMU_TSBSZ_128K;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) upa_writeq(control, iommu->iommu_control);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) void psycho_pbm_init_common(struct pci_pbm_info *pbm, struct platform_device *op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) const char *chip_name, int chip_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct device_node *dp = op->dev.of_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) pbm->name = dp->full_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) pbm->numa_node = NUMA_NO_NODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) pbm->chip_type = chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) pbm->chip_version = of_getintprop_default(dp, "version#", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) pbm->chip_revision = of_getintprop_default(dp, "module-revision#", 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) pbm->op = op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) pbm->pci_ops = &sun4u_pci_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) pbm->config_space_reg_bits = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) pbm->index = pci_num_pbms++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) pci_get_pbm_props(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) pci_determine_mem_io_space(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) printk(KERN_INFO "%s: %s PCI Bus Module ver[%x:%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) pbm->name, chip_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) pbm->chip_version, pbm->chip_revision);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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