Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /* pci_sun4v.h: SUN4V specific PCI controller support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2006 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #ifndef _PCI_SUN4V_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #define _PCI_SUN4V_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) long pci_sun4v_iommu_map(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 			 unsigned long tsbid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 			 unsigned long num_ttes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 			 unsigned long io_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 			 unsigned long io_page_list_pa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) unsigned long pci_sun4v_iommu_demap(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 				    unsigned long tsbid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 				    unsigned long num_ttes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) unsigned long pci_sun4v_iommu_getmap(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 				     unsigned long tsbid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 				     unsigned long *io_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 				     unsigned long *real_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) unsigned long pci_sun4v_config_get(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 				   unsigned long pci_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 				   unsigned long config_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 				   unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) int pci_sun4v_config_put(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 			 unsigned long pci_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 			 unsigned long config_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 			 unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 			 unsigned long data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) unsigned long pci_sun4v_msiq_conf(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 					 unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 					 unsigned long msiq_paddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 					 unsigned long num_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) unsigned long pci_sun4v_msiq_info(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				  unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 				  unsigned long *msiq_paddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 				  unsigned long *num_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) unsigned long pci_sun4v_msiq_getvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 				      unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 				      unsigned long *valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) unsigned long pci_sun4v_msiq_setvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 				      unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 				      unsigned long valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) unsigned long pci_sun4v_msiq_getstate(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 				      unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 				      unsigned long *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) unsigned long pci_sun4v_msiq_setstate(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 				      unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 				      unsigned long state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) unsigned long pci_sun4v_msiq_gethead(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 				     unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 				     unsigned long *head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) unsigned long pci_sun4v_msiq_sethead(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 				     unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 				     unsigned long head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) unsigned long pci_sun4v_msiq_gettail(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 				      unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 				      unsigned long *head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) unsigned long pci_sun4v_msi_getvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 				     unsigned long *valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) unsigned long pci_sun4v_msi_setvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 				     unsigned long valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) unsigned long pci_sun4v_msi_getmsiq(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 				    unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 				    unsigned long *msiq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) unsigned long pci_sun4v_msi_setmsiq(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 				    unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 				    unsigned long msiq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 				    unsigned long msitype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) unsigned long pci_sun4v_msi_getstate(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				     unsigned long *state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) unsigned long pci_sun4v_msi_setstate(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 				     unsigned long state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) unsigned long pci_sun4v_msg_getmsiq(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 				    unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 				    unsigned long *msiq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) unsigned long pci_sun4v_msg_setmsiq(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				    unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				    unsigned long msiq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) unsigned long pci_sun4v_msg_getvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 				     unsigned long *valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) unsigned long pci_sun4v_msg_setvalid(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 				     unsigned long msinum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 				     unsigned long valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) /* Sun4v HV IOMMU v2 APIs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) unsigned long pci_sun4v_iotsb_conf(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				   unsigned long ra,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 				   unsigned long table_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 				   unsigned long page_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				   unsigned long dvma_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 				   u64 *iotsb_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long pci_sun4v_iotsb_bind(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 				   unsigned long iotsb_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 				   unsigned int pci_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned long pci_sun4v_iotsb_map(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 				  unsigned long iotsb_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 				  unsigned long iotsb_index_iottes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 				  unsigned long io_attributes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 				  unsigned long io_page_list_pa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 				  long *mapped);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned long pci_sun4v_iotsb_demap(unsigned long devhandle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 				    unsigned long iotsb_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 				    unsigned long iotsb_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 				    unsigned long iottes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 				    unsigned long *demapped);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif /* !(_PCI_SUN4V_H) */