^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* pci_msi.c: Sparc64 MSI support common layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "pci_impl.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct sparc64_msiq_cookie *msiq_cookie = cookie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct pci_pbm_info *pbm = msiq_cookie->pbm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) unsigned long msiqid = msiq_cookie->msiqid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) const struct sparc64_msiq_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) unsigned long orig_head, head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ops = pbm->msi_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) err = ops->get_head(pbm, msiqid, &head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) goto err_get_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) orig_head = head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) for (;;) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) err = ops->dequeue_msi(pbm, msiqid, &head, &msi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (likely(err > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) irq = pbm->msi_irq_table[msi - pbm->msi_first];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) goto err_dequeue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (err == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (likely(head != orig_head)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) err = ops->set_head(pbm, msiqid, head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) goto err_set_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) err_get_head:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) msiqid, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) err_dequeue:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) "gives error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) head, msiqid, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) err_set_head:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "gives error %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) head, msiqid, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static u32 pick_msiq(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static DEFINE_SPINLOCK(rotor_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u32 ret, rotor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) spin_lock_irqsave(&rotor_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) rotor = pbm->msiq_rotor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ret = pbm->msiq_first + rotor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) if (++rotor >= pbm->msiq_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) rotor = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) pbm->msiq_rotor = rotor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) spin_unlock_irqrestore(&rotor_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int alloc_msi(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) for (i = 0; i < pbm->msi_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (!test_and_set_bit(i, pbm->msi_bitmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return i + pbm->msi_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static void free_msi(struct pci_pbm_info *pbm, int msi_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) msi_num -= pbm->msi_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) clear_bit(msi_num, pbm->msi_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static struct irq_chip msi_irq = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .name = "PCI-MSI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .irq_mask = pci_msi_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .irq_unmask = pci_msi_unmask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .irq_enable = pci_msi_unmask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .irq_disable = pci_msi_mask_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* XXX affinity XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) static int sparc64_setup_msi_irq(unsigned int *irq_p,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct msi_desc *entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) const struct sparc64_msiq_ops *ops = pbm->msi_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct msi_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int msi, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u32 msiqid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) *irq_p = irq_alloc(0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!*irq_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) goto out_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) irq_set_chip_and_handler_name(*irq_p, &msi_irq, handle_simple_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) "MSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) err = alloc_msi(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) goto out_irq_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) msi = err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) msiqid = pick_msiq(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) err = ops->msi_setup(pbm, msiqid, msi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) (entry->msi_attrib.is_64 ? 1 : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) goto out_msi_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) pbm->msi_irq_table[msi - pbm->msi_first] = *irq_p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (entry->msi_attrib.is_64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) msg.address_hi = pbm->msi64_start >> 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) msg.address_lo = pbm->msi64_start & 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) msg.address_hi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) msg.address_lo = pbm->msi32_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) msg.data = msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) irq_set_msi_desc(*irq_p, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) pci_write_msi_msg(*irq_p, &msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) out_msi_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) free_msi(pbm, msi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) out_irq_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) irq_set_chip(*irq_p, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) irq_free(*irq_p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) *irq_p = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) out_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static void sparc64_teardown_msi_irq(unsigned int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) const struct sparc64_msiq_ops *ops = pbm->msi_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned int msi_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) for (i = 0; i < pbm->msi_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (pbm->msi_irq_table[i] == irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if (i >= pbm->msi_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) pci_err(pdev, "%s: teardown: No MSI for irq %u\n", pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) msi_num = pbm->msi_first + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) pbm->msi_irq_table[i] = ~0U;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) err = ops->msi_teardown(pbm, msi_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) pci_err(pdev, "%s: teardown: ops->teardown() on MSI %u, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) "irq %u, gives error %d\n", pbm->name, msi_num, irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) free_msi(pbm, msi_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) irq_set_chip(irq, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) irq_free(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int msi_bitmap_alloc(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) unsigned long size, bits_per_ulong;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) bits_per_ulong = sizeof(unsigned long) * 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) size /= 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) BUG_ON(size % sizeof(unsigned long));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pbm->msi_bitmap = kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (!pbm->msi_bitmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static void msi_bitmap_free(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) kfree(pbm->msi_bitmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) pbm->msi_bitmap = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static int msi_table_alloc(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int size, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (!pbm->msiq_irq_cookies)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) for (i = 0; i < pbm->msiq_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) struct sparc64_msiq_cookie *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) p = &pbm->msiq_irq_cookies[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) p->pbm = pbm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) p->msiqid = pbm->msiq_first + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) size = pbm->msi_num * sizeof(unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) pbm->msi_irq_table = kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!pbm->msi_irq_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) kfree(pbm->msiq_irq_cookies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) pbm->msiq_irq_cookies = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static void msi_table_free(struct pci_pbm_info *pbm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) kfree(pbm->msiq_irq_cookies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) pbm->msiq_irq_cookies = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) kfree(pbm->msi_irq_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) pbm->msi_irq_table = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) const struct sparc64_msiq_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) unsigned long msiqid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) unsigned long devino)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int irq = ops->msiq_build_irq(pbm, msiqid, devino);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int err, nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) nid = pbm->numa_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (nid != -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) cpumask_t numa_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) cpumask_copy(&numa_mask, cpumask_of_node(nid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) irq_set_affinity(irq, &numa_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) err = request_irq(irq, sparc64_msiq_interrupt, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) "MSIQ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) const struct sparc64_msiq_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) for (i = 0; i < pbm->msiq_num; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) unsigned long msiqid = i + pbm->msiq_first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned long devino = i + pbm->msiq_first_devino;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) err = bringup_one_msi_queue(pbm, ops, msiqid, devino);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) const struct sparc64_msiq_ops *ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) const u32 *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) val = of_get_property(pbm->op->dev.of_node, "#msi-eqs", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (!val || len != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) pbm->msiq_num = *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (pbm->msiq_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) const struct msiq_prop {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) u32 first_msiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) u32 num_msiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u32 first_devino;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) } *mqp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) const struct msi_range_prop {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) u32 first_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) u32 num_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) } *mrng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) const struct addr_range_prop {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) u32 msi32_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) u32 msi32_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) u32 msi32_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) u32 msi64_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) u32 msi64_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) u32 msi64_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) } *arng;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) val = of_get_property(pbm->op->dev.of_node, "msi-eq-size", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (!val || len != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) pbm->msiq_ent_count = *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) mqp = of_get_property(pbm->op->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) "msi-eq-to-devino", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) if (!mqp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) mqp = of_get_property(pbm->op->dev.of_node,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) "msi-eq-devino", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (!mqp || len != sizeof(struct msiq_prop))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) pbm->msiq_first = mqp->first_msiq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) pbm->msiq_first_devino = mqp->first_devino;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) val = of_get_property(pbm->op->dev.of_node, "#msi", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (!val || len != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) pbm->msi_num = *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) mrng = of_get_property(pbm->op->dev.of_node, "msi-ranges", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (!mrng || len != sizeof(struct msi_range_prop))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) pbm->msi_first = mrng->first_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) val = of_get_property(pbm->op->dev.of_node, "msi-data-mask", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (!val || len != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pbm->msi_data_mask = *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) val = of_get_property(pbm->op->dev.of_node, "msix-data-width", &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (!val || len != 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) pbm->msix_data_width = *val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) arng = of_get_property(pbm->op->dev.of_node, "msi-address-ranges",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) &len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (!arng || len != sizeof(struct addr_range_prop))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) pbm->msi32_start = ((u64)arng->msi32_high << 32) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) (u64) arng->msi32_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) pbm->msi64_start = ((u64)arng->msi64_high << 32) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) (u64) arng->msi64_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) pbm->msi32_len = arng->msi32_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) pbm->msi64_len = arng->msi64_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (msi_bitmap_alloc(pbm))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (msi_table_alloc(pbm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) msi_bitmap_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (ops->msiq_alloc(pbm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) msi_table_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) msi_bitmap_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (sparc64_bringup_msi_queues(pbm, ops)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) ops->msiq_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) msi_table_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) msi_bitmap_free(pbm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) goto no_msi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) "devino[0x%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) pbm->msiq_first, pbm->msiq_num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) pbm->msiq_ent_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) pbm->msiq_first_devino);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) "width[%u]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) pbm->msix_data_width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) printk(KERN_INFO "%s: MSI addr32[0x%llx:0x%x] "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) "addr64[0x%llx:0x%x]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) pbm->msi32_start, pbm->msi32_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) pbm->msi64_start, pbm->msi64_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) pbm->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) __pa(pbm->msi_queues));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) pbm->msi_ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) pbm->setup_msi_irq = sparc64_setup_msi_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) pbm->teardown_msi_irq = sparc64_teardown_msi_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) no_msi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) pbm->msiq_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) printk(KERN_INFO "%s: No MSI support.\n", pbm->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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