^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * IOMMU mmap management and range allocation functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Based almost entirely upon the powerpc iommu allocator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/iommu-helper.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/hash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/iommu-common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static unsigned long iommu_large_alloc = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static DEFINE_PER_CPU(unsigned int, iommu_hash_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline bool need_flush(struct iommu_map_table *iommu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) return ((iommu->flags & IOMMU_NEED_FLUSH) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static inline void set_flush(struct iommu_map_table *iommu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) iommu->flags |= IOMMU_NEED_FLUSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static inline void clear_flush(struct iommu_map_table *iommu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) iommu->flags &= ~IOMMU_NEED_FLUSH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static void setup_iommu_pool_hash(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static bool do_once;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) if (do_once)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) do_once = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) for_each_possible_cpu(i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) per_cpu(iommu_hash_common, i) = hash_32(i, IOMMU_POOL_HASHBITS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * Initialize iommu_pool entries for the iommu_map_table. `num_entries'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * is the number of table entries. If `large_pool' is set to true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * the top 1/4 of the table will be set aside for pool allocations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * of more than iommu_large_alloc pages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) void iommu_tbl_pool_init(struct iommu_map_table *iommu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned long num_entries,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 table_shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) void (*lazy_flush)(struct iommu_map_table *),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) bool large_pool, u32 npools,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool skip_span_boundary_check)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned int start, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct iommu_pool *p = &(iommu->large_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) setup_iommu_pool_hash();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (npools == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) iommu->nr_pools = IOMMU_NR_POOLS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) iommu->nr_pools = npools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) BUG_ON(npools > IOMMU_NR_POOLS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) iommu->table_shift = table_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) iommu->lazy_flush = lazy_flush;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) start = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) if (skip_span_boundary_check)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) iommu->flags |= IOMMU_NO_SPAN_BOUND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (large_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) iommu->flags |= IOMMU_HAS_LARGE_POOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!large_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) iommu->poolsize = num_entries/iommu->nr_pools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) iommu->poolsize = (num_entries * 3 / 4)/iommu->nr_pools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) for (i = 0; i < iommu->nr_pools; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) spin_lock_init(&(iommu->pools[i].lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) iommu->pools[i].start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) iommu->pools[i].hint = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) start += iommu->poolsize; /* start for next pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) iommu->pools[i].end = start - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (!large_pool)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* initialize large_pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) spin_lock_init(&(p->lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) p->start = start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) p->hint = p->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) p->end = num_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long iommu_tbl_range_alloc(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) struct iommu_map_table *iommu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned long npages,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long *handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned long mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int align_order)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned int pool_hash = __this_cpu_read(iommu_hash_common);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned long n, end, start, limit, boundary_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct iommu_pool *pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int pass = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned int pool_nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned int npools = iommu->nr_pools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) bool large_pool = ((iommu->flags & IOMMU_HAS_LARGE_POOL) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) bool largealloc = (large_pool && npages > iommu_large_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned long shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned long align_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (align_order > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) align_mask = ~0ul >> (BITS_PER_LONG - align_order);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Sanity check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (unlikely(npages == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) WARN_ON_ONCE(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return IOMMU_ERROR_CODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (largealloc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pool = &(iommu->large_pool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) pool_nr = 0; /* to keep compiler happy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* pick out pool_nr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pool_nr = pool_hash & (npools - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pool = &(iommu->pools[pool_nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) spin_lock_irqsave(&pool->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) again:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (pass == 0 && handle && *handle &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) (*handle >= pool->start) && (*handle < pool->end))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) start = *handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) start = pool->hint;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) limit = pool->end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* The case below can happen if we have a small segment appended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * to a large, or when the previous alloc was at the very end of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * the available space. If so, go back to the beginning. If a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * flush is needed, it will get done based on the return value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * from iommu_area_alloc() below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (start >= limit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) start = pool->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) shift = iommu->table_map_base >> iommu->table_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (limit + shift > mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) limit = mask - shift + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* If we're constrained on address range, first try
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * at the masked hint to avoid O(n) search complexity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * but on second pass, start at 0 in pool 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if ((start & mask) >= limit || pass > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) spin_unlock(&(pool->lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) pool = &(iommu->pools[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) spin_lock(&(pool->lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) start = pool->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) start &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * if the skip_span_boundary_check had been set during init, we set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * things up so that iommu_is_span_boundary() merely checks if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * (index + npages) < num_tsb_entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) if ((iommu->flags & IOMMU_NO_SPAN_BOUND) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) boundary_size = iommu->poolsize * iommu->nr_pools;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) boundary_size = dma_get_seg_boundary_nr_pages(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) iommu->table_shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) n = iommu_area_alloc(iommu->map, limit, start, npages, shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) boundary_size, align_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (n == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (likely(pass == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* First failure, rescan from the beginning. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) pool->hint = pool->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) set_flush(iommu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) pass++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) } else if (!largealloc && pass <= iommu->nr_pools) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) spin_unlock(&(pool->lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) pool_nr = (pool_nr + 1) & (iommu->nr_pools - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) pool = &(iommu->pools[pool_nr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) spin_lock(&(pool->lock));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) pool->hint = pool->start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) set_flush(iommu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) pass++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) goto again;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* give up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) n = IOMMU_ERROR_CODE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) goto bail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (iommu->lazy_flush &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) (n < pool->hint || need_flush(iommu))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) clear_flush(iommu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) iommu->lazy_flush(iommu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) end = n + npages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) pool->hint = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* Update handle for SG allocations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *handle = end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) bail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) spin_unlock_irqrestore(&(pool->lock), flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct iommu_pool *get_pool(struct iommu_map_table *tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) unsigned long entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct iommu_pool *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) unsigned long largepool_start = tbl->large_pool.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) bool large_pool = ((tbl->flags & IOMMU_HAS_LARGE_POOL) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) /* The large pool is the last pool at the top of the table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (large_pool && entry >= largepool_start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) p = &tbl->large_pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) unsigned int pool_nr = entry / tbl->poolsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) BUG_ON(pool_nr >= tbl->nr_pools);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) p = &tbl->pools[pool_nr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* Caller supplies the index of the entry into the iommu map table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * itself when the mapping from dma_addr to the entry is not the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) * default addr->entry mapping below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) void iommu_tbl_range_free(struct iommu_map_table *iommu, u64 dma_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned long npages, unsigned long entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) struct iommu_pool *pool;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) unsigned long shift = iommu->table_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (entry == IOMMU_ERROR_CODE) /* use default addr->entry mapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) entry = (dma_addr - iommu->table_map_base) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) pool = get_pool(iommu, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) spin_lock_irqsave(&(pool->lock), flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) bitmap_clear(iommu->map, entry, npages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) spin_unlock_irqrestore(&(pool->lock), flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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