^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * head.S: The initial boot code for the Sparc port of Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1995,1999 Pete Zaitcev (zaitcev@yahoo.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 1997 Michael A. Griffith (grif@acm.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * CompactPCI platform by Eric Brower, 1999.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/version.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/head.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/contregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/psr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/kdebug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/winmacro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/thread_info.h> /* TI_UWINMASK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/pgtable.h> /* PGDIR_SHIFT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* The following are used with the prom_vector node-ops to figure out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * the cpu-type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .globl cputypval
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) cputypval:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .asciz "sun4m"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .ascii " "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Tested on SS-5, SS-10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) cputypvar:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .asciz "compatible"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) notsup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .asciz "Sparc-Linux sun4/sun4c or MMU-less not supported\n\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) sun4e_notsup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .asciz "Sparc-Linux sun4e support does not exist\n\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* The trap-table - located in the __HEAD section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include "ttable_32.S"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .align PAGE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* This was the only reasonable way I could think of to properly align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * these page-table data structures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .globl empty_zero_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) empty_zero_page: .skip PAGE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) EXPORT_SYMBOL(empty_zero_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .global root_flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .global ram_flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .global root_dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .global sparc_ramdisk_image
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .global sparc_ramdisk_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* This stuff has to be in sync with SILO and other potential boot loaders
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * Fields should be kept upward compatible and whenever any change is made,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * HdrS version should be incremented.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .ascii "HdrS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .word LINUX_VERSION_CODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .half 0x0203 /* HdrS version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) root_flags:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .half 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) root_dev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .half 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ram_flags:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .half 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) sparc_ramdisk_image:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) sparc_ramdisk_size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .word reboot_command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .word 0, 0, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .word _end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * %g7 and at prom_vector_p. And also quickly check whether we are on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * a v0, v2, or v3 prom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) gokernel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Ok, it's nice to know, as early as possible, if we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * are already mapped where we expect to be in virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * memory. The Solaris /boot elf format bootloader
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * will peek into our elf header and load us where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * we want to be, otherwise we have to re-map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * Some boot loaders don't place the jmp'rs address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * in %o7, so we do a pc-relative call to a local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * label, then see what %o7 has.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mov %o7, %g4 ! Save %o7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* Jump to it, and pray... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) current_pc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) call 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) mov %o7, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tst %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) be no_sun4u_here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) mov %g4, %o7 /* Previous %o7. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) mov %o0, %l0 ! stash away romvec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) mov %o0, %g7 ! put it here too
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) mov %o1, %l1 ! stash away debug_vec too
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* Ok, let's check out our run time program counter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) set current_pc, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) cmp %g3, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) be already_mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* %l6 will hold the offset we have to subtract
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * from absolute symbols in order to access areas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * in our own image. If already mapped this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * just plain zero, else it is KERNBASE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) set KERNBASE, %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) b copy_prom_lvl14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) already_mapped:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) mov 0, %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) /* Copy over the Prom's level 14 clock handler. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) copy_prom_lvl14:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* DJHR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * preserve our linked/calculated instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) set lvl14_save, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) set t_irq14, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) sub %g1, %l6, %g1 ! translate to physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) sub %g3, %l6, %g3 ! translate to physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ldd [%g3], %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) std %g4, [%g1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ldd [%g3+8], %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) std %g4, [%g1+8]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) rd %tbr, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) andn %g1, 0xfff, %g1 ! proms trap table base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) or %g0, (0x1e<<4), %g2 ! offset to lvl14 intr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) or %g1, %g2, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) set t_irq14, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) sub %g3, %l6, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ldd [%g2], %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) std %g4, [%g3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ldd [%g2 + 0x8], %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) std %g4, [%g3 + 0x8] ! Copy proms handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* DON'T TOUCH %l0 thru %l5 in these remapping routines,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * we need their values afterwards!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* Now check whether we are already mapped, if we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * are we can skip all this garbage coming up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) copy_prom_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) cmp %l6, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) be go_to_highmem ! this will be a nop then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* Validate that we are in fact running on an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * SRMMU based cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) set 0x4000, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) cmp %g7, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) bne not_a_sun4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) halt_notsup:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ld [%g7 + 0x68], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) set notsup, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) sub %o0, %l6, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) call %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ba halt_me
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) not_a_sun4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* It looks like this is a machine we support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * Now find out what MMU we are dealing with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * LEON - identified by the psr.impl field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * Viking - identified by the psr.impl field
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * In all other cases a sun4m srmmu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * We check that the MMU is enabled in all cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* Check if this is a LEON CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) rd %psr, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) srl %g3, PSR_IMPL_SHIFT, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) and %g3, PSR_IMPL_SHIFTED_MASK, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) cmp %g3, PSR_IMPL_LEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) be leon_remap /* It is a LEON - jump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* Sanity-check, is MMU enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) lda [%g0] ASI_M_MMUREGS, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) andcc %g1, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) be halt_notsup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* Check for a viking (TI) module. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) cmp %g3, PSR_IMPL_TI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) bne srmmu_not_viking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* Figure out what kind of viking we are on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * We need to know if we have to play with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * AC bit and disable traps or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* I've only seen MicroSparc's on SparcClassics with this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * bit set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) set 0x800, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) lda [%g0] ASI_M_MMUREGS, %g3 ! peek in the control reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) and %g2, %g3, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) subcc %g3, 0x0, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) bnz srmmu_not_viking ! is in mbus mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rd %psr, %g3 ! DO NOT TOUCH %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) andn %g3, PSR_ET, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) wr %g2, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* Get context table pointer, then convert to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * a physical address, which is 36 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) set AC_M_CTPR, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) lda [%g4] ASI_M_MMUREGS, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) sll %g4, 0x4, %g4 ! We use this below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ! DO NOT TOUCH %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /* Set the AC bit in the Viking's MMU control reg. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) lda [%g0] ASI_M_MMUREGS, %g5 ! DO NOT TOUCH %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) set 0x8000, %g6 ! AC bit mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) or %g5, %g6, %g6 ! Or it in...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) sta %g6, [%g0] ASI_M_MMUREGS ! Close your eyes...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* Grrr, why does it seem like every other load/store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * on the sun4m is in some ASI space...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * Fine with me, let's get the pointer to the level 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * page table directory and fetch its entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) lda [%g4] ASI_M_BYPASS, %o1 ! This is a level 1 ptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) srl %o1, 0x4, %o1 ! Clear low 4 bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) sll %o1, 0x8, %o1 ! Make physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* Ok, pull in the PTD. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) lda [%o1] ASI_M_BYPASS, %o2 ! This is the 0x0 16MB pgd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* Calculate to KERNBASE entry. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) add %o1, KERNBASE >> (PGDIR_SHIFT - 2), %o3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* Poke the entry into the calculated address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) sta %o2, [%o3] ASI_M_BYPASS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* I don't get it Sun, if you engineered all these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) * boot loaders and the PROM (thank you for the debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * features btw) why did you not have them load kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * images up in high address space, since this is necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * for ABI compliance anyways? Does this low-mapping provide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * enhanced interoperability?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * "The PROM is the computer."
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* Ok, restore the MMU control register we saved in %g5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) sta %g5, [%g0] ASI_M_MMUREGS ! POW... ouch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* Turn traps back on. We saved it in %g3 earlier. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) wr %g3, 0x0, %psr ! tick tock, tick tock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* Now we burn precious CPU cycles due to bad engineering. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* Wow, all that just to move a 32-bit value from one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * place to another... Jump to high memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) b go_to_highmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) srmmu_not_viking:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* This works on viking's in Mbus mode and all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * other MBUS modules. It is virtually the same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * the above madness sans turning traps off and flipping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * the AC bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) set AC_M_CTPR, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) lda [%g1] ASI_M_MMUREGS, %g1 ! get ctx table ptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) sll %g1, 0x4, %g1 ! make physical addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) lda [%g1] ASI_M_BYPASS, %g1 ! ptr to level 1 pg_table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) srl %g1, 0x4, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) add %g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) sta %g2, [%g3] ASI_M_BYPASS ! place at KERNBASE entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) b go_to_highmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) nop ! wheee....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) leon_remap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /* Sanity-check, is MMU enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) lda [%g0] ASI_LEON_MMUREGS, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) andcc %g1, 1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) be halt_notsup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* Same code as in the srmmu_not_viking case,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * with the LEON ASI for mmuregs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) set AC_M_CTPR, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) lda [%g1] ASI_LEON_MMUREGS, %g1 ! get ctx table ptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) sll %g1, 0x4, %g1 ! make physical addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) lda [%g1] ASI_M_BYPASS, %g1 ! ptr to level 1 pg_table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) srl %g1, 0x4, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) lda [%g1] ASI_M_BYPASS, %g2 ! get level1 entry for 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) add %g1, KERNBASE >> (PGDIR_SHIFT - 2), %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) sta %g2, [%g3] ASI_M_BYPASS ! place at KERNBASE entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) b go_to_highmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) nop ! wheee....
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) /* Now do a non-relative jump so that PC is in high-memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) go_to_highmem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) set execute_in_high_mem, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) jmpl %g1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* The code above should be at beginning and we have to take care about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * short jumps, as branching to .init.text section from .text is usually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) * impossible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __INIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) /* Acquire boot time privileged register values, this will help debugging.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) * I figure out and store nwindows and nwindowsm1 later on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) execute_in_high_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) mov %l0, %o0 ! put back romvec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mov %l1, %o1 ! and debug_vec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) sethi %hi(prom_vector_p), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) st %o0, [%g1 + %lo(prom_vector_p)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) sethi %hi(linux_dbvec), %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) st %o1, [%g1 + %lo(linux_dbvec)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* Get the machine type via the romvec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * getprops node operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) add %g7, 0x1c, %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) ld [%l1], %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ld [%l0], %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) call %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) or %g0, %g0, %o0 ! next_node(0) = first_node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) or %o0, %g0, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) sethi %hi(cputypvar), %o1 ! First node has cpu-arch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) or %o1, %lo(cputypvar), %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) sethi %hi(cputypval), %o2 ! information, the string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) or %o2, %lo(cputypval), %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ld [%l1], %l0 ! 'compatible' tells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ld [%l0 + 0xc], %l0 ! that we want 'sun4x' where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) call %l0 ! x is one of 'm', 'd' or 'e'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) nop ! %o2 holds pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ! to a buf where above string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) ! will get stored by the prom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* Check value of "compatible" property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * "value" => "model"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * leon => sparc_leon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * sun4m => sun4m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * sun4s => sun4m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * sun4d => sun4d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * sun4e => "no_sun4e_here"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * '*' => "no_sun4u_here"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * Check single letters only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) set cputypval, %o2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* If cputypval[0] == 'l' (lower case letter L) this is leon */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) ldub [%o2], %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) cmp %l1, 'l'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) be leon_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* Check cputypval[4] to find the sun model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) ldub [%o2 + 0x4], %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) cmp %l1, 'm'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) be sun4m_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) cmp %l1, 's'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) be sun4m_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) cmp %l1, 'd'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) be sun4d_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) cmp %l1, 'e'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) be no_sun4e_here ! Could be a sun4e.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) b no_sun4u_here ! AIEEE, a V9 sun4u... Get our BIG BROTHER kernel :))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) leon_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* LEON CPU - set boot_cpu_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) sethi %hi(boot_cpu_id), %g2 ! boot-cpu index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ldub [%g2 + %lo(boot_cpu_id)], %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) cmp %g1, 0xff ! unset means first CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) bne leon_smp_cpu_startup ! continue only with master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) /* Get CPU-ID from most significant 4-bit of ASR17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) rd %asr17, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) srl %g1, 28, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* Update boot_cpu_id only on boot cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) stub %g1, [%g2 + %lo(boot_cpu_id)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) ba continue_boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* CPUID in bootbus can be found at PA 0xff0140000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define SUN4D_BOOTBUS_CPUID 0xf0140000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) sun4d_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) /* Need to patch call to handler_irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) set patch_handler_irq, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) set sun4d_handler_irq, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) sethi %hi(0x40000000), %g3 ! call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) sub %g5, %g4, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) srl %g5, 2, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) or %g5, %g3, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) st %g5, [%g4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /* Get our CPU id out of bootbus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) set SUN4D_BOOTBUS_CPUID, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) lduba [%g3] ASI_M_CTL, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) and %g3, 0xf8, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) srl %g3, 3, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) sta %g4, [%g0] ASI_M_VIKING_TMP1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) sethi %hi(boot_cpu_id), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) stb %g4, [%g5 + %lo(boot_cpu_id)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* Fall through to sun4m_init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) sun4m_init:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* Ok, the PROM could have done funny things and apple cider could still
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * be sitting in the fault status/address registers. Read them all to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * clear them so we don't get magic faults later on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) /* This sucks, apparently this makes Vikings call prom panic, will fix later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) rd %psr, %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) srl %o1, PSR_IMPL_SHIFT, %o1 ! Get a type of the CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) subcc %o1, PSR_IMPL_TI, %g0 ! TI: Viking or MicroSPARC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) be continue_boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) set AC_M_SFSR, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) lda [%o0] ASI_M_MMUREGS, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) set AC_M_SFAR, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) lda [%o0] ASI_M_MMUREGS, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) /* Fujitsu MicroSPARC-II has no asynchronous flavors of FARs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) subcc %o1, 0, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) be continue_boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) set AC_M_AFSR, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) lda [%o0] ASI_M_MMUREGS, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) set AC_M_AFAR, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) lda [%o0] ASI_M_MMUREGS, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) continue_boot:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* Aieee, now set PC and nPC, enable traps, give ourselves a stack and it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * show-time!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* Turn on Supervisor, EnableFloating, and all the PIL bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * Also puts us in register window zero with traps off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) set (PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) wr %g2, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* I want a kernel stack NOW! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) set init_thread_union, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) set (THREAD_SIZE - STACKFRAME_SZ), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) add %g1, %g2, %sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) mov 0, %fp /* And for good luck */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) /* Zero out our BSS section. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) set __bss_start , %o0 ! First address of BSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) set _end , %o1 ! Last address of BSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) add %o0, 0x1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) stb %g0, [%o0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) subcc %o0, %o1, %g0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) bl 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) add %o0, 0x1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* If boot_cpu_id has not been setup by machine specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * init-code above we default it to zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) sethi %hi(boot_cpu_id), %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ldub [%g2 + %lo(boot_cpu_id)], %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) cmp %g3, 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) bne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) mov %g0, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) stub %g3, [%g2 + %lo(boot_cpu_id)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) 1: sll %g3, 2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* Initialize the uwinmask value for init task just in case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * But first make current_set[boot_cpu_id] point to something useful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) set init_thread_union, %g6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) set current_set, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) st %g6, [%g2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) add %g2, %g3, %g2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) st %g6, [%g2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) st %g0, [%g6 + TI_UWINMASK]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* Compute NWINDOWS and stash it away. Now uses %wim trick explained
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * in the V8 manual. Ok, this method seems to work, Sparc is cool...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * No, it doesn't work, have to play the save/readCWP/restore trick.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) wr %g0, 0x0, %wim ! so we do not get a trap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) save
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) rd %psr, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) restore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) and %g3, 0x1f, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) add %g3, 0x1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) mov 2, %g1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) wr %g1, 0x0, %wim ! make window 1 invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) cmp %g3, 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) bne 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) /* Adjust our window handling routines to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * do things correctly on 7 window Sparcs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) #define PATCH_INSN(src, dest) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) set src, %g5; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) set dest, %g2; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ld [%g5], %g4; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) st %g4, [%g2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Patch for window spills... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) PATCH_INSN(spnwin_patch1_7win, spnwin_patch1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) PATCH_INSN(spnwin_patch2_7win, spnwin_patch2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) PATCH_INSN(spnwin_patch3_7win, spnwin_patch3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) /* Patch for window fills... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) PATCH_INSN(fnwin_patch1_7win, fnwin_patch1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) PATCH_INSN(fnwin_patch2_7win, fnwin_patch2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Patch for trap entry setup... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) PATCH_INSN(tsetup_7win_patch1, tsetup_patch1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) PATCH_INSN(tsetup_7win_patch2, tsetup_patch2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) PATCH_INSN(tsetup_7win_patch3, tsetup_patch3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) PATCH_INSN(tsetup_7win_patch4, tsetup_patch4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) PATCH_INSN(tsetup_7win_patch5, tsetup_patch5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) PATCH_INSN(tsetup_7win_patch6, tsetup_patch6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* Patch for returning from traps... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) PATCH_INSN(rtrap_7win_patch1, rtrap_patch1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) PATCH_INSN(rtrap_7win_patch2, rtrap_patch2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PATCH_INSN(rtrap_7win_patch3, rtrap_patch3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) PATCH_INSN(rtrap_7win_patch4, rtrap_patch4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) PATCH_INSN(rtrap_7win_patch5, rtrap_patch5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* Patch for killing user windows from the register file. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) PATCH_INSN(kuw_patch1_7win, kuw_patch1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /* Now patch the kernel window flush sequences.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * This saves 2 traps on every switch and fork.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) set 0x01000000, %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) set flush_patch_one, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) set flush_patch_two, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) set flush_patch_three, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) set flush_patch_four, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) set flush_patch_exception, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) set flush_patch_switch, %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) st %g4, [%g5 + 0x18]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) st %g4, [%g5 + 0x1c]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) sethi %hi(nwindows), %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) st %g3, [%g4 + %lo(nwindows)] ! store final value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) sub %g3, 0x1, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) sethi %hi(nwindowsm1), %g4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) st %g3, [%g4 + %lo(nwindowsm1)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) /* Here we go, start using Linux's trap table... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) set trapbase, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) wr %g3, 0x0, %tbr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) /* Finally, turn on traps so that we can call c-code. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) rd %psr, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) wr %g3, 0x0, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) wr %g3, PSR_ET, %psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) WRITE_PAUSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /* Call sparc32_start_kernel(struct linux_romvec *rp) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) sethi %hi(prom_vector_p), %g5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ld [%g5 + %lo(prom_vector_p)], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) call sparc32_start_kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /* We should not get here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) call halt_me
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) no_sun4e_here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) ld [%g7 + 0x68], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) set sun4e_notsup, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) call %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) b halt_me
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) __INITDATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) sun4u_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .asciz "finddevice"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) sun4u_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .asciz "/chosen"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) sun4u_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .asciz "getprop"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) sun4u_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .asciz "stdout"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) sun4u_5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .asciz "write"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) sun4u_6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .asciz "\n\rOn sun4u you have to use sparc64 kernel\n\rand not a sparc32 version\n\r\n\r"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) sun4u_6e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) sun4u_7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) .asciz "exit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) .align 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) sun4u_a1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) .word 0, sun4u_1, 0, 1, 0, 1, 0, sun4u_2, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) sun4u_r1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) sun4u_a2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) .word 0, sun4u_3, 0, 4, 0, 1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) sun4u_i2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .word 0, 0, sun4u_4, 0, sun4u_1, 0, 8, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) sun4u_r2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) sun4u_a3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) .word 0, sun4u_5, 0, 3, 0, 1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) sun4u_i3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .word 0, 0, sun4u_6, 0, sun4u_6e - sun4u_6 - 1, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) sun4u_r3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) sun4u_a4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) .word 0, sun4u_7, 0, 0, 0, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) sun4u_r4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) __INIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) no_sun4u_here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) set sun4u_a1, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) set current_pc, %l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) cmp %l2, %g3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) be 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) mov %o4, %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) sub %g3, %l2, %l6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) add %o0, %l6, %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) mov %o0, %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) mov sun4u_r4 - sun4u_a1, %l3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) ld [%l4], %l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) add %l4, 4, %l4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) cmp %l5, %l2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) add %l5, %l6, %l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) bgeu,a 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) st %l5, [%l4 - 4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) subcc %l3, 4, %l3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) bne 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) ld [%l4], %l5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) call %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) mov %o0, %l1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) ld [%l1 + (sun4u_r1 - sun4u_a1)], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) add %l1, (sun4u_a2 - sun4u_a1), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) call %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) st %o1, [%o0 + (sun4u_i2 - sun4u_a2)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) ld [%l1 + (sun4u_1 - sun4u_a1)], %o1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) add %l1, (sun4u_a3 - sun4u_a1), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) call %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) st %o1, [%o0 + (sun4u_i3 - sun4u_a3)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) call %l0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) add %l1, (sun4u_a4 - sun4u_a1), %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) /* Not reached */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) halt_me:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) ld [%g7 + 0x74], %o0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) call %o0 ! Get us out of here...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) nop ! Apparently Solaris is better.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) /* Ok, now we continue in the .data/.text sections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * Fill up the prom vector, note in particular the kind first element,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * no joke. I don't need all of them in here as the entire prom vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) * gets initialized in c-code so all routines can use it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) prom_vector_p:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /* We calculate the following at boot time, window fills/spills and trap entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * code uses these to keep track of the register windows.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) .globl nwindows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) .globl nwindowsm1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) nwindows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) .word 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) nwindowsm1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .word 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) /* Boot time debugger vector value. We need this later on. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .globl linux_dbvec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) linux_dbvec:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .align 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .globl lvl14_save
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) lvl14_save:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .word 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .word t_irq14
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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