Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * Copyright (c) 2017 Oracle and/or its affiliates. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #ifndef _ASM_SPARC_VVAR_DATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define _ASM_SPARC_VVAR_DATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <asm/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/barrier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct vvar_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	unsigned int seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	int vclock_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	struct { /* extract of a clocksource struct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		u64	cycle_last;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		u64	mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		int	mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		int	shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	} clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	/* open coded 'struct timespec' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	u64		wall_time_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	u64		wall_time_snsec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	u64		monotonic_time_snsec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	u64		monotonic_time_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	u64		monotonic_time_coarse_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	u64		monotonic_time_coarse_nsec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	u64		wall_time_coarse_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	u64		wall_time_coarse_nsec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	int		tz_minuteswest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	int		tz_dsttime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern struct vvar_data *vvar_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) extern int vdso_fix_stick;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline unsigned int vvar_read_begin(const struct vvar_data *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	unsigned int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) repeat:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	ret = READ_ONCE(s->seq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	if (unlikely(ret & 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		goto repeat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	smp_rmb(); /* Finish all reads before we return seq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static inline int vvar_read_retry(const struct vvar_data *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 					unsigned int start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	smp_rmb(); /* Finish all reads before checking the value of seq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	return unlikely(s->seq != start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static inline void vvar_write_begin(struct vvar_data *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	++s->seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	smp_wmb(); /* Makes sure that increment of seq is reflected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static inline void vvar_write_end(struct vvar_data *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	smp_wmb(); /* Makes the value of seq current before we increment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	++s->seq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #endif /* _ASM_SPARC_VVAR_DATA_H */