^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * viking.h: Defines specific to the GNU/Viking MBUS module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This is SRMMU stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef _SPARC_VIKING_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define _SPARC_VIKING_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/asi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/mxcc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/pgtsrmmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* Bits in the SRMMU control register for GNU/Viking modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * -----------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * -----------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 1 = Twalks are cacheable in E-cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * and never caches them internally (or so states the docs). Therefore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * for machines lacking an E-cache (ie. in MBUS mode) this bit must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * remain cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 1 = Passthru physical accesses cacheable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * This indicates whether accesses are cacheable when no cachable bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * is present in the pte when the processor is in boot-mode or the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * access does not need pte's for translation (ie. pass-thru ASI's).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * "Cachable" is only referring to E-cache (if present) and not the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * on chip split I/D caches of the GNU/Viking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * This enables snooping on the GNU/Viking bus. This must be on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * for the hardware cache consistency mechanisms of the GNU/Viking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * to work at all. On non-mxcc GNU/Viking modules the split I/D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * caches will snoop regardless of whether they are enabled, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * takes care of the case where the I or D or both caches are turned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * off yet still contain valid data. Note also that this bit does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * not affect GNU/Viking store-buffer snoops, those happen if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * store-buffer is enabled no matter what.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * This indicates whether the GNU/Viking is in boot-mode or not,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * if it is then all instruction fetch physical addresses are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * computed as 0xff0000000 + low 28 bits of requested address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * GNU/Viking boot-mode does not affect data accesses. Also,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * in boot mode instruction accesses bypass the split on chip I/D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * caches, they may be cached by the GNU/MXCC if present and enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * This indicated the GNU/Viking configuration present. If in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * not then the GNU/Viking is on a module VBUS connected directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * The GNU/Viking store buffer allows the chip to continue execution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * after a store even if the data cannot be placed in one of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * caches during that cycle. If disabled, all stores operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * occur synchronously.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * IC: Instruction Cache -- 0 = off, 1 = on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * DC: Data Cache -- 0 = off, 1 = 0n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * These bits enable the on-cpu GNU/Viking split I/D caches. Note,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * as mentioned above, these caches will snoop the bus in GNU/MBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * configurations even when disabled to avoid data corruption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define VIKING_MMUENABLE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define VIKING_NOFAULT 0x00000002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define VIKING_PSO 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define VIKING_DCENABLE 0x00000100 /* Enable data cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define VIKING_MMODE 0x00000800 /* MBUS mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define VIKING_BMODE 0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * GNU/Viking Breakpoint Action Register fields.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * GNU/Viking Cache Tags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline void viking_flush_icache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) : "i" (ASI_M_IC_FLCLEAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static inline void viking_flush_dcache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) : "i" (ASI_M_DC_FLCLEAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static inline void viking_unlock_icache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static inline void viking_unlock_dcache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) __asm__ __volatile__("sta %%g0, [%0] %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static inline void viking_set_bpreg(unsigned long regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) __asm__ __volatile__("sta %0, [%%g0] %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) : "r" (regval), "i" (ASI_M_ACTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static inline unsigned long viking_get_bpreg(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned long regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) __asm__ __volatile__("lda [%%g0] %1, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) : "=r" (regval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) : "i" (ASI_M_ACTION));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static inline void viking_get_dcache_ptag(int set, int block,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) unsigned long *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) unsigned long info, page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) "or %%g0, %%g2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) "or %%g0, %%g3, %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) : "=r" (info), "=r" (page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) : "r" (ptag), "i" (ASI_M_DATAC_TAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) : "g2", "g3");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) data[0] = info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) data[1] = page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static inline void viking_mxcc_turn_off_parity(unsigned long *mregp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) unsigned long *mxcc_cregp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) unsigned long mreg = *mregp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned long mxcc_creg = *mxcc_cregp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) mreg &= ~(VIKING_PCENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) mxcc_creg &= ~(MXCC_CTL_PARE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) __asm__ __volatile__ ("set 1f, %%g2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) "andcc %%g2, 4, %%g0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) "bne 2f\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) "1:\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "sta %0, [%%g0] %3\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "sta %1, [%2] %4\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) "b 1f\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) " nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) "2:\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) "sta %0, [%%g0] %3\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) "sta %1, [%2] %4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) "1:\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) : /* no output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) : "r" (mreg), "r" (mxcc_creg),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) "r" (MXCC_CREG), "i" (ASI_M_MMUREGS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) "i" (ASI_M_MXCC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) : "g2", "memory", "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) *mregp = mreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *mxcc_cregp = mxcc_creg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static inline unsigned long viking_hwprobe(unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) vaddr &= PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* Probe all MMU entries. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) __asm__ __volatile__("lda [%1] %2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) : "=r" (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (!val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* Probe region. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) __asm__ __volatile__("lda [%1] %2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) : "=r" (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) vaddr &= ~PGDIR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) vaddr >>= PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return val | (vaddr << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Probe segment. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) __asm__ __volatile__("lda [%1] %2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) : "=r" (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) vaddr &= ~PMD_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) vaddr >>= PAGE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return val | (vaddr << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* Probe page. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) __asm__ __volatile__("lda [%1] %2, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) : "=r" (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #endif /* !(_SPARC_VIKING_H) */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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