Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * psr.h: This file holds the macros for masking off various parts of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *        the processor status register on the Sparc. This is valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *        for Version 8. On the V9 this is renamed to the PSTATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *        register and its members are accessed as fields like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *        PSTATE.PRIV for the current CPU privilege level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __LINUX_SPARC_PSR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __LINUX_SPARC_PSR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <uapi/asm/psr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* Get the %psr register. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline unsigned int get_psr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned int psr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		"rd	%%psr, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	: "=r" (psr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	: /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	: "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	return psr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline void put_psr(unsigned int new_psr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		"wr	%0, 0x0, %%psr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		"nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	: /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	: "r" (new_psr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	: "memory", "cc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* Get the %fsr register.  Be careful, make sure the floating point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)  * enable bit is set in the %psr when you execute this or you will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)  * incur a trap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern unsigned int fsr_storage;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static inline unsigned int get_fsr(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	unsigned int fsr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	__asm__ __volatile__(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		"st	%%fsr, %1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		"ld	%1, %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	: "=r" (fsr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	: "m" (fsr_storage));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	return fsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif /* !(__ASSEMBLY__) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif /* !(__LINUX_SPARC_PSR_H) */