Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _SPARC64_PIL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _SPARC64_PIL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* To avoid some locking problems, we hard allocate certain PILs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * for SMP cross call messages that must do a etrap/rtrap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * A local_irq_disable() does not block the cross call delivery, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * when SMP locking is an issue we reschedule the event into a PIL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * interrupt which is blocked by local_irq_disable().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * In fact any XCALL which has to etrap/rtrap has a problem because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * it is difficult to prevent rtrap from running BH's, and that would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * need to be done if the XCALL arrived while %pil==PIL_NORMAL_MAX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * Finally, in order to handle profiling events even when a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * local_irq_disable() is in progress, we only disable up to level 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * interrupts.  Profile counter overflow interrupts arrive at level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * 15.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PIL_SMP_CALL_FUNC	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PIL_SMP_RECEIVE_SIGNAL	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PIL_SMP_CAPTURE		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PIL_DEVICE_IRQ		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PIL_SMP_CALL_FUNC_SNGL	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PIL_DEFERRED_PCR_WORK	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PIL_KGDB_CAPTURE	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PIL_NORMAL_MAX		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PIL_NMI			15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif /* !(_SPARC64_PIL_H) */