Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef ___ASM_SPARC_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define ___ASM_SPARC_PCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /* Can be used to override the logic in pci_scan_bus for skipping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * already-configured bus numbers - to be used for buggy BIOSes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * or architectures with incomplete PCI setup by the loader.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define pcibios_assign_all_busses()	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define PCIBIOS_MIN_IO		0UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PCIBIOS_MIN_MEM		0UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PCI_IRQ_NONE		0xffffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifdef CONFIG_SPARC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* PCI IOMMU mapping bypass support. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* PCI 64-bit addressing works for all slots on all controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * types on sparc64.  However, it requires that the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * can drive enough of the 64 bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PCI64_REQUIRED_MASK	(~(u64)0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PCI64_ADDR_BASE		0xfffc000000000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Return the index of the PCI controller for device PDEV. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int pci_domain_nr(struct pci_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static inline int pci_proc_domain(struct pci_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Platform support for /proc/bus/pci/X/Y mmap()s. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define HAVE_PCI_MMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define arch_can_pci_mmap_io()	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define get_pci_unmapped_area get_fb_unmapped_area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif /* CONFIG_SPARC64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #if defined(CONFIG_SPARC64) || defined(CONFIG_LEON_PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	return PCI_IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm-generic/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #endif /* ___ASM_SPARC_PCI_H */