Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * pbm.h: PCI bus module pseudo driver software state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *        Adopted from sparc64 by V. Roganov and G. Raiko
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Original header:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * pbm.h: U2P PCI bus module pseudo driver software state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * To put things into perspective, consider sparc64 with a few PCI controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * Each type would have an own structure, with instances related one to one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * We have only pcic on sparc, but we want to be compatible with sparc64 pbm.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * All three represent different abstractions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *   pci_bus  - Linux PCI subsystem view of a PCI bus (including bridged buses)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *   pbm      - Arch-specific view of a PCI bus (sparc or sparc64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *   pcic     - Chip-specific information for PCIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #ifndef __SPARC_PBM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define __SPARC_PBM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/oplib.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct linux_pbm_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	int		prom_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	char		prom_name[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/* struct linux_prom_pci_ranges	pbm_ranges[PROMREG_MAX]; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	/* int		num_pbm_ranges; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	/* Now things for the actual PCI bus probes. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	unsigned int	pci_first_busno;	/* Can it be nonzero? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	struct pci_bus	*pci_bus;		/* Was inline, MJ allocs now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* PCI devices which are not bridges have this placed in their pci_dev
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)  * sysdata member.  This makes OBP aware PCI device drivers easier to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)  * code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct pcidev_cookie {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	struct linux_pbm_info		*pbm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	struct device_node		*prom_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #endif /* !(__SPARC_PBM_H) */