^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com) Gaisler Research
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2004 Stefan Holst (mail@s-holst.de) Uni-Stuttgart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef LEON_H_INCLUDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define LEON_H_INCLUDE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* mmu register access, ASI_LEON_MMUREGS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define LEON_CNR_CTRL 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define LEON_CNR_CTXP 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define LEON_CNR_CTX 0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define LEON_CNR_F 0x300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define LEON_CNR_FADDR 0x400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define LEON_CNR_CTX_NCTX 256 /*number of MMU ctx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define LEON_CNR_CTRL_TLBDIS 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define LEON_MMUTLB_ENT_MAX 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * diagnostic access from mmutlb.vhd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 0: pte address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 4: pte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 8: additional flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define LEON_DIAGF_LVL 0x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define LEON_DIAGF_WR 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define LEON_DIAGF_WR_SHIFT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define LEON_DIAGF_HIT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define LEON_DIAGF_HIT_SHIFT 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define LEON_DIAGF_CTX 0x1fe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define LEON_DIAGF_CTX_SHIFT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define LEON_DIAGF_VALID 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define LEON_DIAGF_VALID_SHIFT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* irq masks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define LEON_HARD_INT(x) (1 << (x)) /* irq 0-15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define LEON_MCFG2_SRAMDIS 0x00002000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define LEON_MCFG2_SDRAMEN 0x00004000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define LEON_MCFG2_SRAMBANKSZ_SHIFT 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define LEON_MCFG2_SDRAMBANKSZ 0x03800000 /* [25-23] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define LEON_MCFG2_SDRAMBANKSZ_SHIFT 23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define LEON_TCNT0_MASK 0x7fffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define ASI_LEON3_SYSCTRL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define ASI_LEON3_SYSCTRL_ICFG 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define ASI_LEON3_SYSCTRL_DCFG 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* do a physical address bypass write, i.e. for 0x80000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline void leon_store_reg(unsigned long paddr, unsigned long value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r"(value), "r"(paddr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "i"(ASI_LEON_BYPASS) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* do a physical address bypass load, i.e. for 0x80000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static inline unsigned long leon_load_reg(unsigned long paddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned long retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) __asm__ __volatile__("lda [%1] %2, %0\n\t" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "=r"(retval) : "r"(paddr), "i"(ASI_LEON_BYPASS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* macro access for leon_load_reg() and leon_store_reg() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) void leon_switch_mm(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) void leon_init_IRQ(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static inline unsigned long sparc_leon3_get_dcachecfg(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) __asm__ __volatile__("lda [%1] %2, %0\n\t" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) "=r"(retval) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) "r"(ASI_LEON3_SYSCTRL_DCFG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "i"(ASI_LEON3_SYSCTRL));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* enable snooping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline void sparc_leon3_enable_snooping(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) "set 0x800000, %%l2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) "or %%l2, %%l1, %%l2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static inline int sparc_leon3_snooping_enabled(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) u32 cctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) __asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return ((cctrl >> 23) & 1) && ((cctrl >> 17) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline void sparc_leon3_disable_cache(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) "set 0x00000f, %%l2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) "andn %%l2, %%l1, %%l2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static inline unsigned long sparc_leon3_asr17(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u32 asr17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) __asm__ __volatile__ ("rd %%asr17, %0\n\t" : "=r"(asr17));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return asr17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static inline int sparc_leon3_cpuid(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return sparc_leon3_asr17() >> 28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #endif /*!__ASSEMBLY__*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) # define LEON3_IRQ_IPI_DEFAULT 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) # define LEON3_IRQ_TICKER (leon3_gptimer_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) # define LEON3_IRQ_CROSS_CALL 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #if defined(PAGE_SIZE_LEON_8K)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define LEON_PAGE_SIZE_LEON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #elif defined(PAGE_SIZE_LEON_16K)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define LEON_PAGE_SIZE_LEON 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define LEON_PAGE_SIZE_LEON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #if LEON_PAGE_SIZE_LEON == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* [ 8, 6, 6 ] + 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define LEON_PGD_SH 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define LEON_PGD_M 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define LEON_PMD_SH 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define LEON_PMD_SH_V (LEON_PGD_SH-2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define LEON_PMD_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define LEON_PTE_SH 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define LEON_PTE_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #elif LEON_PAGE_SIZE_LEON == 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* [ 7, 6, 6 ] + 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define LEON_PGD_SH 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define LEON_PGD_M 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define LEON_PMD_SH 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define LEON_PMD_SH_V (LEON_PGD_SH-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define LEON_PMD_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define LEON_PTE_SH 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define LEON_PTE_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #elif LEON_PAGE_SIZE_LEON == 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* [ 6, 6, 6 ] + 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define LEON_PGD_SH 26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define LEON_PGD_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define LEON_PMD_SH 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define LEON_PMD_SH_V (LEON_PGD_SH-0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define LEON_PMD_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define LEON_PTE_SH 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define LEON_PTE_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #elif LEON_PAGE_SIZE_LEON == 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* [ 4, 7, 6 ] + 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define LEON_PGD_SH 28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define LEON_PGD_M 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define LEON_PMD_SH 21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define LEON_PMD_SH_V (LEON_PGD_SH-0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define LEON_PMD_M 0x7f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define LEON_PTE_SH 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define LEON_PTE_M 0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #error cannot determine LEON_PAGE_SIZE_LEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define LEON3_XCCR_SETS_MASK 0x07000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define LEON3_XCCR_SSIZE_MASK 0x00f00000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define LEON2_CCR_DSETS_MASK 0x03000000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define LEON2_CFG_SSIZE_MASK 0x00007000UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct vm_area_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) void leon_flush_icache_all(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) void leon_flush_dcache_all(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) void leon_flush_cache_all(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) void leon_flush_tlb_all(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) extern int leon_flush_during_switch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) int leon_flush_needed(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* struct that hold LEON3 cache configuration registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct leon3_cacheregs {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) unsigned long ccr; /* 0x00 - Cache Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) unsigned long iccr; /* 0x08 - Instruction Cache Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) unsigned long dccr; /* 0x0c - Data Cache Configuration Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct device_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct task_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) unsigned int leon_build_device_irq(unsigned int real_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) irq_flow_handler_t flow_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) const char *name, int do_ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) void leon_update_virq_handling(unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) irq_flow_handler_t flow_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) const char *name, int do_ack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) void leon_init_timers(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) void leon_node_init(struct device_node *dp, struct device_node ***nextp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) void init_leon(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) void poke_leonsparc(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) void leon3_getCacheRegs(struct leon3_cacheregs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) extern int leon3_ticker_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int leon_smp_nrcpus(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) void leon_clear_profile_irq(int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) void leon_smp_done(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) void leon_boot_cpus(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) int leon_boot_one_cpu(int i, struct task_struct *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) void leon_init_smp(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) extern unsigned int smpleon_ipi[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) extern unsigned int linux_trap_ipi15_leon[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) extern int leon_ipi_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* macros used in leon_mm.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) #define PFN(x) ((x) >> PAGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define _SRMMU_PTE_PMASK_LEON 0xffffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * On LEON PCI Memory space is mapped 1:1 with physical address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * are converted into CPU addresses to virtual addresses that are mapped with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * MMU to the PCI Host PCI I/O space window which are translated to the low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * 64Kbytes by the Host controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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