Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _SPARC64_DCR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _SPARC64_DCR_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define DCR_DPE		0x0000000000001000 /* III+: D$ Parity Error Enable	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define DCR_OBS		0x0000000000000fc0 /* Observability Bus Controls	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define DCR_BPE		0x0000000000000020 /* Branch Predict Enable		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define DCR_RPE		0x0000000000000010 /* Return Address Prediction Enable	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define DCR_SI		0x0000000000000008 /* Single Instruction Disable	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define DCR_IPE		0x0000000000000004 /* III+: I$ Parity Error Enable	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define DCR_IFPOE	0x0000000000000002 /* IRQ FP Operation Enable		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define DCR_MS		0x0000000000000001 /* Multi-Scalar dispatch		*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #endif /* _SPARC64_DCR_H */