Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _SPARC_ASM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _SPARC_ASM_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* Macros to assist the sharing of assembler code between 32-bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * 64-bit sparc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifdef CONFIG_SPARC64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define BRANCH32(TYPE, PREDICT, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	TYPE,PREDICT	%icc, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	TYPE,a,PREDICT	%icc, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	brz,PREDICT	REG, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	brz,a,PREDICT	REG, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	brnz,PREDICT	REG, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	brnz,a,PREDICT	REG, DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define BRANCH32(TYPE, PREDICT, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	TYPE		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	TYPE,a		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	cmp		REG, 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	be		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	cmp		REG, 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	be,a		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	cmp		REG, 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	bne		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	cmp		REG, 0; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	bne,a		DEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif /* _SPARC_ASM_H */