Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * arch/sh/mm/tlb-urb.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * TLB entry wiring helpers for URB-equipped parts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2010  Matt Fleming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/mmu_context.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * Load the entry for 'addr' into the TLB and wire the entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned long status, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	int urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	status = __raw_readl(MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	status &= ~MMUCR_URC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * Make sure we're not trying to wire the last TLB entry slot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	BUG_ON(!--urb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	urb = urb % MMUCR_URB_NENTRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	 * Insert this entry into the highest non-wired TLB slot (via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	 * the URC field).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	status |= (urb << MMUCR_URC_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	__raw_writel(status, MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	ctrl_barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	/* Load the entry into the TLB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	__update_tlb(vma, addr, pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	/* ... and wire it up. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	status = __raw_readl(MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	status &= ~MMUCR_URB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	status |= (urb << MMUCR_URB_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	__raw_writel(status, MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	ctrl_barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)  * Unwire the last wired TLB entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)  * It should also be noted that it is not possible to wire and unwire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)  * TLB entries in an arbitrary order. If you wire TLB entry N, followed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)  * by entry N+1, you must unwire entry N+1 first, then entry N. In this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)  * respect, it works like a stack or LIFO queue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void tlb_unwire_entry(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	unsigned long status, flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	int urb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	status = __raw_readl(MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	status &= ~MMUCR_URB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	 * Make sure we're not trying to unwire a TLB entry when none
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	 * have been wired.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	BUG_ON(urb++ == MMUCR_URB_NENTRIES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	urb = urb % MMUCR_URB_NENTRIES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 	status |= (urb << MMUCR_URB_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 	__raw_writel(status, MMUCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 	ctrl_barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }