^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2006 Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) /* Moderately Space-optimized libgcc routines for the Renesas SH /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) STMicroelectronics ST40 CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Contributed by J"orn Rennecke joern.rennecke@st.com. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) sh4-200 run times:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) udiv small divisor: 55 cycles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) udiv large divisor: 52 cycles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) sdiv small divisor, positive result: 59 cycles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) sdiv large divisor, positive result: 56 cycles
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) sdiv small divisor, negative result: 65 cycles (*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) sdiv large divisor, negative result: 62 cycles (*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) (*): r2 is restored in the rts delay slot and has a lingering latency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) of two more cycles. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) .balign 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) .global __udivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .global __udivsi3_i4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .set __udivsi3_i4, __udivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .type __udivsi3_i4i, @function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .type __sdivsi3_i4i, @function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) __udivsi3_i4i:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) sts pr,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) mov.l r4,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) extu.w r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) cmp/eq r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) swap.w r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) shlr16 r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) bf/s large_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) div0u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mov.l r5,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) shll16 r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) sdiv_small_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) bsr div6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) bsr div6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) xtrct r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) xtrct r0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) bsr div7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) swap.w r4,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) bsr div7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) xtrct r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) mov.l @r15+,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) swap.w r0,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) mov.l @r15+,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) jmp @r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) div7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) div6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) div1 r5,r4; div1 r5,r4; div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) divx3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) large_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) mov.l r5,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) sdiv_large_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) xor r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .rept 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) bsr divx3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) mov.l @r15+,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) mov.l @r15+,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) jmp @r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .global __sdivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .global __sdivsi3_i4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .global __sdivsi3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .set __sdivsi3_i4, __sdivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .set __sdivsi3, __sdivsi3_i4i
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) __sdivsi3_i4i:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) mov.l r4,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) cmp/pz r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) mov.l r5,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) bt/s pos_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) cmp/pz r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) neg r5,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) extu.w r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) bt/s neg_result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) cmp/eq r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) neg r4,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) pos_result:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) swap.w r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) bra sdiv_check_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) sts pr,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) pos_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) extu.w r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) bt/s pos_result
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) cmp/eq r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) neg r4,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) neg_result:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) mova negate_result,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) mov r0,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) swap.w r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) lds r2,macl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) sts pr,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) sdiv_check_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) shlr16 r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) bf/s sdiv_large_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) div0u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) bra sdiv_small_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) shll16 r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .balign 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) negate_result:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) neg r0,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) jmp @r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) sts macl,r2
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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