Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)    Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)    2004, 2005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)    Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) !! libgcc routines for the Renesas / SuperH SH CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) !! Contributed by Steve Chamberlain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) !! sac@cygnus.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	.balign 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	.global	__udivsi3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	.type	__udivsi3, @function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) div8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) div7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	div1 r5,r4; div1 r5,r4; div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) divx4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	div1 r5,r4; rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	div1 r5,r4; rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	div1 r5,r4; rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	rts; div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __udivsi3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	sts.l pr,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	extu.w r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	cmp/eq r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	bf/s large_divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	div0u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	swap.w r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	shlr16 r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	bsr div8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	shll16 r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	bsr div7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	xtrct r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	xtrct r0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	bsr div8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	swap.w r4,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	bsr div7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	div1 r5,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	lds.l @r15+,pr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	xtrct r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	swap.w r0,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	shlr16 r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) large_divisor:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	mov #0,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	xtrct r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	xtrct r0,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	bsr divx4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	bsr divx4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	bsr divx4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	bsr divx4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	lds.l @r15+,pr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	rotcl r0