Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0+ WITH GCC-exception-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)    Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)    2004, 2005, 2006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)    Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) !! libgcc routines for the Renesas / SuperH SH CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) !! Contributed by Steve Chamberlain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) !! sac@cygnus.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) !! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) !! recoded in assembly by Toshiyasu Morita
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) !! tm@netcom.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)    ELF local label prefixes by J"orn Rennecke
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)    amylaar@cygnus.com  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	.balign	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	.global	__movmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.global __movstr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	.set __movstr, __movmem	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	/* This would be a lot simpler if r6 contained the byte count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	   minus 64, and we wouldn't be called here for a byte count of 64.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) __movmem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	sts.l	pr,@-r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	shll2	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	bsr	__movmemSI52+2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	mov.l	@(48,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	.balign	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) movmem_loop: /* Reached with rts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	mov.l	@(60,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	add	#-64,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	mov.l	r0,@(60,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	tst	r6,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	mov.l	@(56,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	bt	movmem_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	mov.l	r0,@(56,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	cmp/pl	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	mov.l	@(52,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	add	#64,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	mov.l	r0,@(52,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	add	#64,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	bt	__movmemSI52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) ! done all the large groups, do the remainder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) ! jump to movmem+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	mova	__movmemSI4+4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	add	r6,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	jmp	@r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) movmem_done: ! share slot insn, works out aligned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	lds.l	@r15+,pr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	mov.l	r0,@(56,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	mov.l	@(52,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	mov.l	r0,@(52,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.balign	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	.global	__movmemSI64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	.global __movstrSI64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.set	__movstrSI64, __movmemSI64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) __movmemSI64:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	mov.l	@(60,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	mov.l	r0,@(60,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.global	__movmemSI60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.global __movstrSI60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.set	__movstrSI60, __movmemSI60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) __movmemSI60:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	mov.l	@(56,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	mov.l	r0,@(56,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.global	__movmemSI56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.global __movstrSI56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.set	__movstrSI56, __movmemSI56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) __movmemSI56:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	mov.l	@(52,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	mov.l	r0,@(52,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.global	__movmemSI52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	.global __movstrSI52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	.set	__movstrSI52, __movmemSI52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) __movmemSI52:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	mov.l	@(48,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	mov.l	r0,@(48,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.global	__movmemSI48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.global	__movstrSI48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.set	__movstrSI48, __movmemSI48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) __movmemSI48:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	mov.l	@(44,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	mov.l	r0,@(44,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	.global	__movmemSI44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	.global	__movstrSI44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.set	__movstrSI44, __movmemSI44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) __movmemSI44:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	mov.l	@(40,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	mov.l	r0,@(40,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.global	__movmemSI40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.global __movstrSI40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.set	__movstrSI40, __movmemSI40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) __movmemSI40:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	mov.l	@(36,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	mov.l	r0,@(36,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	.global	__movmemSI36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	.global	__movstrSI36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	.set	__movstrSI36, __movmemSI36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) __movmemSI36:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	mov.l	@(32,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	mov.l	r0,@(32,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	.global	__movmemSI32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	.global	__movstrSI32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	.set	__movstrSI32, __movmemSI32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) __movmemSI32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	mov.l	@(28,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	mov.l	r0,@(28,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	.global	__movmemSI28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	.global	__movstrSI28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	.set	__movstrSI28, __movmemSI28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) __movmemSI28:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	mov.l	@(24,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	mov.l	r0,@(24,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.global	__movmemSI24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.global	__movstrSI24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.set	__movstrSI24, __movmemSI24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) __movmemSI24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	mov.l	@(20,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	mov.l	r0,@(20,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	.global	__movmemSI20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.global	__movstrSI20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	.set	__movstrSI20, __movmemSI20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) __movmemSI20:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	mov.l	@(16,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	mov.l	r0,@(16,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.global	__movmemSI16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	.global	__movstrSI16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	.set	__movstrSI16, __movmemSI16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) __movmemSI16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	mov.l	@(12,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	mov.l	r0,@(12,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.global	__movmemSI12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.global	__movstrSI12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.set	__movstrSI12, __movmemSI12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) __movmemSI12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	mov.l	@(8,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	mov.l	r0,@(8,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	.global	__movmemSI8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	.global	__movstrSI8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	.set	__movstrSI8, __movmemSI8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) __movmemSI8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	mov.l	@(4,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	mov.l	r0,@(4,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	.global	__movmemSI4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	.global	__movstrSI4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	.set	__movstrSI4, __movmemSI4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __movmemSI4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	mov.l	@(0,r5),r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	mov.l	r0,@(0,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	.global	__movmem_i4_even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	.global	__movstr_i4_even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	.set	__movstr_i4_even, __movmem_i4_even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	.global	__movmem_i4_odd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	.global	__movstr_i4_odd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	.set	__movstr_i4_odd, __movmem_i4_odd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	.global	__movmemSI12_i4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	.global	__movstrSI12_i4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	.set	__movstrSI12_i4, __movmemSI12_i4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	.p2align	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) L_movmem_2mod4_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	mov.l	r0,@(16,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	mov.l	r1,@(20,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	.p2align	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) __movmem_i4_even:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	mov.l	@r5+,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	bra	L_movmem_start_even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	mov.l	@r5+,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) __movmem_i4_odd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	mov.l	@r5+,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	add	#-4,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	mov.l	@r5+,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	mov.l	@r5+,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	mov.l	r1,@(4,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	mov.l	r2,@(8,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) L_movmem_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	mov.l	r3,@(12,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	dt	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	mov.l	@r5+,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	bt/s	L_movmem_2mod4_end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	mov.l	@r5+,r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	add	#16,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) L_movmem_start_even:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	mov.l	@r5+,r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	mov.l	@r5+,r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	mov.l	r0,@r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	dt	r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	mov.l	r1,@(4,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	bf/s	L_movmem_loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	mov.l	r2,@(8,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	mov.l	r3,@(12,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	.p2align	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) __movmemSI12_i4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	mov.l	@r5,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	mov.l	@(4,r5),r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	mov.l	@(8,r5),r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	mov.l	r0,@r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	mov.l	r1,@(4,r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	mov.l	r2,@(8,r4)