^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* $Id: memset.S,v 1.1 2000/04/14 16:49:01 mjd Exp $
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * "memset" implementation of SuperH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1999 Niibe Yutaka
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * void *memset(void *s, int c, size_t n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ENTRY(memset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) tst r6,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) bt/s 5f ! if n=0, do nothing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) add r6,r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mov #12,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) cmp/gt r6,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) bt/s 4f ! if it's too small, set a byte at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) mov r4,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) and #3,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) cmp/eq #0,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) bt/s 2f ! It's aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) sub r0,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) dt r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) bf/s 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) mov.b r5,@-r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 2: ! make VVVV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extu.b r5,r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) swap.b r5,r0 ! V0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) or r0,r5 ! VV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) swap.w r5,r0 ! VV00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) or r0,r5 ! VVVV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) mov r6,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) shlr2 r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) shlr r0 ! r0 = r6 >> 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) dt r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mov.l r5,@-r4 ! set 8-byte at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) bf/s 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mov.l r5,@-r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) mov #7,r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) and r0,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) tst r6,r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) bt 5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) ! fill bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) dt r6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) bf/s 4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) mov.b r5,@-r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) mov r4,r0