^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * unsigned long __xdiv64_32(unsigned long long n, unsigned long d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) ENTRY(__xdiv64_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifdef CONFIG_CPU_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) mov r4, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) mov r5, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) mov r4, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) mov r5, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) cmp/hs r6, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) bf.s 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) mov #0, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) mov r1, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) mov #0, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) div0u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .rept 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) rotcl r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) div1 r6, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) rotcl r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) mul.l r6, r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) sts macl, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) sub r3, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) div0u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .rept 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) div1 r6, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .endr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #ifdef CONFIG_CPU_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) mov r2, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) rotcl r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) mov r0, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mov r2, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif