^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Disassemble SuperH instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1999 kaz Kojima
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2008 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Format of an instruction in memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) HEX_0, HEX_1, HEX_2, HEX_3, HEX_4, HEX_5, HEX_6, HEX_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) HEX_8, HEX_9, HEX_A, HEX_B, HEX_C, HEX_D, HEX_E, HEX_F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) REG_N, REG_M, REG_NM, REG_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) BRANCH_12, BRANCH_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) DISP_8, DISP_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) IMM_4, IMM_4BY2, IMM_4BY4, PCRELIMM_8BY2, PCRELIMM_8BY4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) IMM_8, IMM_8BY2, IMM_8BY4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) } sh_nibble_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) A_END, A_BDISP12, A_BDISP8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) A_DEC_M, A_DEC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) A_DISP_GBR, A_DISP_PC, A_DISP_REG_M, A_DISP_REG_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) A_GBR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) A_IMM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) A_INC_M, A_INC_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) A_IND_M, A_IND_N, A_IND_R0_REG_M, A_IND_R0_REG_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) A_MACH, A_MACL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) A_PR, A_R0, A_R0_GBR, A_REG_M, A_REG_N, A_REG_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) A_SR, A_VBR, A_SSR, A_SPC, A_SGR, A_DBR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) F_REG_N, F_REG_M, D_REG_N, D_REG_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) X_REG_N, /* Only used for argument parsing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) X_REG_M, /* Only used for argument parsing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DX_REG_N, DX_REG_M, V_REG_N, V_REG_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) FD_REG_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) XMTRX_M4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) F_FR0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) FPUL_N, FPUL_M, FPSCR_N, FPSCR_M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) } sh_arg_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static struct sh_opcode_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) sh_arg_type arg[7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) sh_nibble_type nibbles[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) } sh_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {"bra",{A_BDISP12},{HEX_A,BRANCH_12}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {"bsr",{A_BDISP12},{HEX_B,BRANCH_12}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {"bt.s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {"bt/s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {"bf/s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {"clrs",{0},{HEX_0,HEX_0,HEX_4,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {"cmp/str",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {"div0s",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {"div1",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {"jmp",{A_IND_N},{HEX_4,REG_N,HEX_2,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) {"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_7,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) {"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) {"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {"mov.b",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {"mov.l",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {"mov.w",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) {"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {"movca.l",{A_R0,A_IND_N},{HEX_0,REG_N,HEX_C,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {"mulu",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {"neg",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {"negc",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {"ocbi",{A_IND_N},{HEX_0,REG_N,HEX_9,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {"ocbp",{A_IND_N},{HEX_0,REG_N,HEX_A,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {"ocbwb",{A_IND_N},{HEX_0,REG_N,HEX_B,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) {"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {"shll16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) {"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {"shlr16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_7,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) {"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) {"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_7,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) {"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) {"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) {"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) {"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {"subv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {"swap.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {"swap.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) {"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) {"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) {"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {"dmuls.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {"dmulu.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {"braf",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {"bsrf",{A_REG_N},{HEX_0,REG_N,HEX_0,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) {"fabs",{FD_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) {"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) {"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) {"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) {"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {"float",{FPUL_M,FD_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) {"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) {"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) {"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {"fmov.d",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {"fmov.d",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) {"fmov.d",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {"fmov.d",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) {"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) {"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {"fneg",{FD_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {"fschg",{0},{HEX_F,HEX_3,HEX_F,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {"fsqrt",{FD_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) {"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {"ftrc",{FD_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) { 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static void print_sh_insn(u32 memaddr, u16 insn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) int relmask = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) int nibs[4] = { (insn >> 12) & 0xf, (insn >> 8) & 0xf, (insn >> 4) & 0xf, insn & 0xf};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int lastsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) struct sh_opcode_info *op = sh_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) for (; op->name; op++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int imm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) int rn = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) int rm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) int rb = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int disp_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) int disp_pc_addr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) for (n = 0; n < 4; n++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int i = op->nibbles[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) if (i < 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (nibs[n] == i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) goto fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) switch (i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) case BRANCH_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) imm = (nibs[2] << 4) | (nibs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (imm & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) imm |= ~0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) imm = ((char)imm) * 2 + 4 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) case BRANCH_12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (imm & 0x800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) imm |= ~0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) imm = imm * 2 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) case IMM_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) imm = nibs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) case IMM_4BY2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) imm = nibs[3] <<1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case IMM_4BY4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) imm = nibs[3] <<2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) case IMM_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) imm = (nibs[2] << 4) | nibs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case PCRELIMM_8BY2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) imm = ((nibs[2] << 4) | nibs[3]) <<1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) relmask = ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) case PCRELIMM_8BY4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) imm = ((nibs[2] << 4) | nibs[3]) <<2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) relmask = ~3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case IMM_8BY2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) imm = ((nibs[2] << 4) | nibs[3]) <<1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) case IMM_8BY4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) imm = ((nibs[2] << 4) | nibs[3]) <<2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) case DISP_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) imm = (nibs[2] << 4) | (nibs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) case DISP_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) imm = nibs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) goto ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) case REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) rn = nibs[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) rm = nibs[n];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case REG_NM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) rn = (nibs[n] & 0xc) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) rm = (nibs[n] & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) case REG_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) rb = nibs[n] & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ok:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) pr_cont("%-8s ", op->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) lastsp = (op->arg[0] == A_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) disp_pc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) for (n = 0; n < 6 && op->arg[n] != A_END; n++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (n && op->arg[1] != A_END)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) pr_cont(", ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) switch (op->arg[n]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) case A_IMM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) pr_cont("#%d", (char)(imm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case A_R0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) pr_cont("r0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) case A_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) pr_cont("r%d", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) case A_INC_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) pr_cont("@r%d+", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) case A_DEC_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) pr_cont("@-r%d", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case A_IND_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) pr_cont("@r%d", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) case A_DISP_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) pr_cont("@(%d,r%d)", imm, rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) case A_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) pr_cont("r%d", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) case A_INC_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) pr_cont("@r%d+", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) case A_DEC_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) pr_cont("@-r%d", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) case A_IND_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) pr_cont("@r%d", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) case A_DISP_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) pr_cont("@(%d,r%d)", imm, rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) case A_REG_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) pr_cont("r%d_bank", rb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) case A_DISP_PC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) disp_pc = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) disp_pc_addr = imm + 4 + (memaddr & relmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) pr_cont("%08x <%pS>", disp_pc_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) (void *)disp_pc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) case A_IND_R0_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) pr_cont("@(r0,r%d)", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case A_IND_R0_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) pr_cont("@(r0,r%d)", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) case A_DISP_GBR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) pr_cont("@(%d,gbr)", imm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) case A_R0_GBR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) pr_cont("@(r0,gbr)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) case A_BDISP12:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) case A_BDISP8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) pr_cont("%08x", imm + memaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) case A_SR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) pr_cont("sr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) case A_GBR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) pr_cont("gbr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) case A_VBR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) pr_cont("vbr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) case A_SSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) pr_cont("ssr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case A_SPC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) pr_cont("spc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) case A_MACH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) pr_cont("mach");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) case A_MACL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) pr_cont("macl");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) case A_PR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) pr_cont("pr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case A_SGR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) pr_cont("sgr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) case A_DBR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) pr_cont("dbr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) case FD_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) case F_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) pr_cont("fr%d", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) case F_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) pr_cont("fr%d", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) case DX_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (rn & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) pr_cont("xd%d", rn & ~1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) case D_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) pr_cont("dr%d", rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) case DX_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if (rm & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) pr_cont("xd%d", rm & ~1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) case D_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) pr_cont("dr%d", rm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) case FPSCR_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) case FPSCR_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) pr_cont("fpscr");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case FPUL_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) case FPUL_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) pr_cont("fpul");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) case F_FR0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) pr_cont("fr0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) case V_REG_N:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) pr_cont("fv%d", rn*4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) case V_REG_M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) pr_cont("fv%d", rm*4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) case XMTRX_M4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pr_cont("xmtrx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (disp_pc && strcmp(op->name, "mova") != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (relmask == ~1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) __get_user(val, (u16 *)disp_pc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) __get_user(val, (u32 *)disp_pc_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) pr_cont(" ! %08x <%pS>", val, (void *)val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) pr_info(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) void show_code(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) unsigned short *pc = (unsigned short *)regs->pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) long i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (regs->pc & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) pr_info("Code:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) for (i = -3 ; i < 6 ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) unsigned short insn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (__get_user(insn, pc + i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) pr_err(" (Bad address in pc)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) pr_info("%s%08lx: ", (i ? " " : "->"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) (unsigned long)(pc + i));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) print_sh_insn((unsigned long)(pc + i), insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) pr_info("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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