Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __ASM_SH_UNCACHED_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __ASM_SH_UNCACHED_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifdef CONFIG_UNCACHED_MAPPING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) extern unsigned long cached_to_uncached;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) extern unsigned long uncached_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) extern unsigned long uncached_start, uncached_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) extern int virt_addr_uncached(unsigned long kaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) extern void uncached_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) extern void uncached_resize(unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * Jump to uncached area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * When handling TLB or caches, we need to do it from an uncached area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define jump_to_uncached()			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) do {						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned long __dummy;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	__asm__ __volatile__(			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		"mova	1f, %0\n\t"		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		"add	%1, %0\n\t"		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		"jmp	@%0\n\t"		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		" nop\n\t"			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		".balign 4\n"			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		"1:"				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		: "=&z" (__dummy)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		: "r" (cached_to_uncached));	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * Back to cached area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define back_to_cached()				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) do {							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned long __dummy;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	ctrl_barrier();					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	__asm__ __volatile__(				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		"mov.l	1f, %0\n\t"			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		"jmp	@%0\n\t"			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		" nop\n\t"				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		".balign 4\n"				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		"1:	.long 2f\n"			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		"2:"					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		: "=&r" (__dummy));			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define virt_addr_uncached(kaddr)	(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define uncached_init()			do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define uncached_resize(size)		BUG()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define jump_to_uncached()		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define back_to_cached()		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #endif /* __ASM_SH_UNCACHED_H */