Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/include/asm-sh/timex.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * sh architecture timex specifications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef __ASM_SH_TIMEX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define __ASM_SH_TIMEX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Only parts using the legacy CPG code for their clock framework
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * implementation need to define their own Pclk value. If provided, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * can be used for accurately setting CLOCK_TICK_RATE, otherwise we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * simply fall back on the i8253 PIT value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifdef CONFIG_SH_PCLK_FREQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CLOCK_TICK_RATE		(CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define CLOCK_TICK_RATE		1193180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm-generic/timex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* __ASM_SH_TIMEX_H */