^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * This file contains the functions and defines necessary to modify and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * use the SuperH page table tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1999 Niibe Yutaka
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2002 - 2007 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __ASM_SH_PGTABLE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ASM_SH_PGTABLE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifdef CONFIG_X2TLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/pgtable-3level.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/pgtable-2level.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/fixmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * ZERO_PAGE is a global shared page that is always zero: used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * for zero-mapped memory areas etc..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Effective and physical address definitions, to aid with sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define NEFF 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define NEFF_SIGN (1LL << (NEFF - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define NEFF_MASK (-1LL << NEFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline unsigned long long neff_sign_extend(unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned long long extended = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return (extended & NEFF_SIGN) ? (extended | NEFF_MASK) : extended;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #ifdef CONFIG_29BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define NPHYS 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define NPHYS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define NPHYS_SIGN (1LL << (NPHYS - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define NPHYS_MASK (-1LL << NPHYS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PGDIR_MASK (~(PGDIR_SIZE-1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Entries per level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define FIRST_USER_ADDRESS 0UL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PHYS_ADDR_MASK29 0x1fffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PHYS_ADDR_MASK32 0xffffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline unsigned long phys_addr_mask(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Is the MMU in 29bit mode? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (__in_29bit_mode())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return PHYS_ADDR_MASK29;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) return PHYS_ADDR_MASK32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define VMALLOC_START (P3SEG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #include <asm/pgtable_32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * protection for execute, and considers it the same as a read. Also, write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * permission implies read permission. This is the closest we can get..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * not only supporting separate execute, read, and write bits, but having
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * completely separate permission bits for user and kernel space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /*xwr*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define __P000 PAGE_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define __P001 PAGE_READONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define __P010 PAGE_COPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define __P011 PAGE_COPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define __P100 PAGE_EXECREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define __P101 PAGE_EXECREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define __P110 PAGE_COPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define __P111 PAGE_COPY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define __S000 PAGE_NONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define __S001 PAGE_READONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define __S010 PAGE_WRITEONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define __S011 PAGE_SHARED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define __S100 PAGE_EXECREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define __S101 PAGE_EXECREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define __S110 PAGE_RWX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define __S111 PAGE_RWX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) typedef pte_t *pte_addr_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define kern_addr_valid(addr) (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct vm_area_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct mm_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) extern void __update_cache(struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned long address, pte_t pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) extern void __update_tlb(struct vm_area_struct *vma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long address, pte_t pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pte_t pte = *ptep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) __update_cache(vma, address, pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) __update_tlb(vma, address, pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) extern void paging_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) extern void page_table_range_init(unsigned long start, unsigned long end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) pgd_t *pgd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static inline bool __pte_access_permitted(pte_t pte, u64 prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return (pte_val(pte) & (prot | _PAGE_SPECIAL)) == prot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #ifdef CONFIG_X2TLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static inline bool pte_access_permitted(pte_t pte, bool write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) u64 prot = _PAGE_PRESENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) prot |= _PAGE_EXT(_PAGE_EXT_KERN_READ | _PAGE_EXT_USER_READ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) prot |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return __pte_access_permitted(pte, prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static inline bool pte_access_permitted(pte_t pte, bool write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) u64 prot = _PAGE_PRESENT | _PAGE_USER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) prot |= _PAGE_RW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return __pte_access_permitted(pte, prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define pte_access_permitted pte_access_permitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* arch/sh/mm/mmap.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define HAVE_ARCH_UNMAPPED_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #endif /* __ASM_SH_PGTABLE_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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