^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __MMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __MMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Privileged Space Mapping Buffer (PMB) definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define PMB_PASCR 0xff000070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define PMB_IRMCR 0xff000078
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define PASCR_SE 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PMB_ADDR 0xf6100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define PMB_DATA 0xf7100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define NR_PMB_ENTRIES 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PMB_E_MASK 0x0000000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PMB_E_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PMB_PFN_MASK 0xff000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PMB_SZ_16M 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PMB_SZ_64M 0x00000010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PMB_SZ_128M 0x00000080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PMB_SZ_512M 0x00000090
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PMB_SZ_MASK PMB_SZ_512M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PMB_C 0x00000008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PMB_WT 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PMB_UB 0x00000200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PMB_CACHE_MASK (PMB_C | PMB_WT | PMB_UB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define PMB_V 0x00000100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PMB_NO_ENTRY (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/threads.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Default "unsigned long" context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) typedef unsigned long mm_context_id_t[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) typedef struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mm_context_id_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void *vdso;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) unsigned long end_brk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #ifdef CONFIG_BINFMT_ELF_FDPIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned long exec_fdpic_loadmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) unsigned long interp_fdpic_loadmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) } mm_context_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #ifdef CONFIG_PMB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* arch/sh/mm/pmb.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) bool __in_29bit_mode(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) void pmb_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned long size, pgprot_t prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) pgprot_t prot, void *caller);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int pmb_unmap(void __iomem *addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pmb_bolt_mapping(unsigned long virt, phys_addr_t phys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned long size, pgprot_t prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static inline void __iomem *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pmb_remap_caller(phys_addr_t phys, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) pgprot_t prot, void *caller)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static inline int pmb_unmap(void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define pmb_init(addr) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #ifdef CONFIG_29BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define __in_29bit_mode() (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define __in_29bit_mode() (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #endif /* CONFIG_PMB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline void __iomem *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) pmb_remap(phys_addr_t phys, unsigned long size, pgprot_t prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return pmb_remap_caller(phys, size, prot, __builtin_return_address(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif /* __MMU_H */