^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __ASM_SH_CMPXCHG_LLSC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __ASM_SH_CMPXCHG_LLSC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) unsigned long retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) __asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) "1: \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) "movli.l @%2, %0 ! xchg_u32 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) "mov %0, %1 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) "mov %3, %0 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "movco.l %0, @%2 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) "bf 1b \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) "synco \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) : "=&z"(tmp), "=&r" (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) : "r" (m), "r" (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) : "t", "memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static inline unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) __cmpxchg_u32(volatile u32 *m, unsigned long old, unsigned long new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned long retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) __asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) "1: \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) "movli.l @%2, %0 ! __cmpxchg_u32 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "mov %0, %1 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) "cmp/eq %1, %3 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "bf 2f \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "mov %4, %0 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "2: \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) "movco.l %0, @%2 \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) "bf 1b \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) "synco \n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) : "=&z" (tmp), "=&r" (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) : "r" (m), "r" (old), "r" (new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) : "t", "memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <asm/cmpxchg-xchg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #endif /* __ASM_SH_CMPXCHG_LLSC_H */