Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * PCI operations for the Sega Dreamcast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2001, 2002  M. R. Brown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2002, 2003  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * The !gapspci_config_access case really shouldn't happen, ever, unless
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * someone implicitly messes around with the last devfn value.. otherwise we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * only support a single device anyways, and if we didn't have a BBA, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * wouldn't make it terribly far through the PCI setup anyways.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * Also, we could very easily support both Type 0 and Type 1 configurations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * here, but since it doesn't seem that there is any such implementation in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * existence, we don't bother.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * I suppose if someone actually gets around to ripping the chip out of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * the BBA and hanging some more devices off of it, then this might be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * something to take into consideration. However, due to the cost of the BBA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * and the general lack of activity by DC hardware hackers, this doesn't seem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * likely to happen anytime soon.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int gapspci_config_access(unsigned char bus, unsigned int devfn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	return (bus == 0) && (devfn == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)  * We can also actually read and write in b/w/l sizes! Thankfully this part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)  * was at least done right, and we don't have to do the stupid masking and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)  * shifting that we do on the 7751! Small wonders never cease to amaze.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	*val = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (!gapspci_config_access(bus->number, devfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		return PCIBIOS_DEVICE_NOT_FOUND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	switch (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)         return PCIBIOS_SUCCESSFUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	if (!gapspci_config_access(bus->number, devfn))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		return PCIBIOS_DEVICE_NOT_FOUND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	switch (size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)         return PCIBIOS_SUCCESSFUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct pci_ops gapspci_pci_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	.read	= gapspci_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	.write	= gapspci_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };