^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/sh/drivers/pci/fixups-dreamcast.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * PCI fixups for the Sega Dreamcast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2001, 2002 M. R. Brown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2002, 2003, 2006 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * This file originally bore the message (with enclosed-$):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Dreamcast PCI: Supports SEGA Broadband Adaptor only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <mach/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static void gapspci_fixup_resources(struct pci_dev *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct pci_channel *p = dev->sysdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct resource res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct pci_bus_region region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) switch (dev->device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) case PCI_DEVICE_ID_SEGA_BBA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * We also assume that dev->devfn == 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) dev->resource[1].start = p->resources[0].start + 0x100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) dev->resource[1].end = dev->resource[1].start + 0x200 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * This is not a normal BAR, prevent any attempts to move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * the BAR, as this will result in a bus lock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) dev->resource[1].flags |= IORESOURCE_PCI_FIXED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Redirect dma memory allocations to special memory window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * If this GAPSPCI region were mapped by a BAR, the CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * phys_addr_t would be pci_resource_start(), and the bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * address would be pci_bus_address(pci_resource_start()).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * But apparently there's no BAR mapping it, so we just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * "know" its CPU address is GAPSPCI_DMA_BASE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) res.start = GAPSPCI_DMA_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) res.flags = IORESOURCE_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) pcibios_resource_to_bus(dev->bus, ®ion, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) BUG_ON(dma_declare_coherent_memory(&dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) res.start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) region.start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) resource_size(&res)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) printk("PCI: Failed resource fixup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * The interrupt routing semantics here are quite trivial.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * We basically only support one interrupt, so we only bother
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * updating a device's interrupt line with this single shared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * interrupt. Keeps routing quite simple, doesn't it?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return GAPSPCI_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }