Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * arch/sh/drivers/dma/dma-api.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * SuperH-specific DMA management API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2003, 2004, 2005  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) DEFINE_SPINLOCK(dma_spin_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) static LIST_HEAD(registered_dmac_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) struct dma_info *get_dma_info(unsigned int chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	struct dma_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	 * Look for each DMAC's range to determine who the owner of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	 * the channel is.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	list_for_each_entry(info, &registered_dmac_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		if ((chan <  info->first_vchannel_nr) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 		    (chan >= info->first_vchannel_nr + info->nr_channels))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		return info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) EXPORT_SYMBOL(get_dma_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) struct dma_info *get_dma_info_by_name(const char *dmac_name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct dma_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	list_for_each_entry(info, &registered_dmac_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 		if (dmac_name && (strcmp(dmac_name, info->name) != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 			return info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) EXPORT_SYMBOL(get_dma_info_by_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) static unsigned int get_nr_channels(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct dma_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	unsigned int nr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	if (unlikely(list_empty(&registered_dmac_list)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		return nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	list_for_each_entry(info, &registered_dmac_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		nr += info->nr_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	return nr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) struct dma_channel *get_dma_channel(unsigned int chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct dma_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	if (unlikely(!info))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		return ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	for (i = 0; i < info->nr_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		channel = &info->channels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		if (channel->vchan == chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			return channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) EXPORT_SYMBOL(get_dma_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) int get_dma_residue(unsigned int chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (info->ops->get_residue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		return info->ops->get_residue(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) EXPORT_SYMBOL(get_dma_residue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int search_cap(const char **haystack, const char *needle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	const char **p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	for (p = haystack; *p; p++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		if (strcmp(*p, needle) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)  * request_dma_bycap - Allocate a DMA channel based on its capabilities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  * @dmac: List of DMA controllers to search
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  * @caps: List of capabilities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  * Search all channels of all DMA controllers to find a channel which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * matches the requested capabilities. The result is the channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  * number if a match is found, or %-ENODEV if no match is found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)  * Note that not all DMA controllers export capabilities, in which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  * case they can never be allocated using this API, and so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  * request_dma() must be used specifying the channel number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	unsigned int found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	struct dma_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	const char **p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	BUG_ON(!dmac || !caps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	list_for_each_entry(info, &registered_dmac_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		if (strcmp(*dmac, info->name) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 			found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (!found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	for (i = 0; i < info->nr_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		struct dma_channel *channel = &info->channels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		if (unlikely(!channel->caps))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		for (p = caps; *p; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			if (!search_cap(channel->caps, *p))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 			if (request_dma(channel->chan, dev_id) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 				return channel->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) EXPORT_SYMBOL(request_dma_bycap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int dmac_search_free_channel(const char *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	struct dma_channel *channel = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	struct dma_info *info = get_dma_info(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	for (i = 0; i < info->nr_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		channel = &info->channels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		if (unlikely(!channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 			return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		if (atomic_read(&channel->busy) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (info->ops->request) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		int result = info->ops->request(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		atomic_set(&channel->busy, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		return channel->chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int request_dma(unsigned int chan, const char *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	struct dma_channel *channel = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (atomic_xchg(&channel->busy, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	if (info->ops->request) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		result = info->ops->request(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		if (result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 			atomic_set(&channel->busy, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) EXPORT_SYMBOL(request_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) void free_dma(unsigned int chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	if (info->ops->free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		info->ops->free(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	atomic_set(&channel->busy, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) EXPORT_SYMBOL(free_dma);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) void dma_wait_for_completion(unsigned int chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	if (channel->flags & DMA_TEI_CAPABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		wait_event(channel->wait_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			   (info->ops->get_residue(channel) == 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	while (info->ops->get_residue(channel))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		cpu_relax();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) EXPORT_SYMBOL(dma_wait_for_completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int register_chan_caps(const char *dmac, struct dma_chan_caps *caps)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	struct dma_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	unsigned int found = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	list_for_each_entry(info, &registered_dmac_list, list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		if (strcmp(dmac, info->name) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 			found = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	if (unlikely(!found))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	for (i = 0; i < info->nr_channels; i++, caps++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		struct dma_channel *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if ((info->first_channel_nr + i) != caps->ch_num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		channel = &info->channels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		channel->caps = caps->caplist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) EXPORT_SYMBOL(register_chan_caps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) void dma_configure_channel(unsigned int chan, unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	if (info->ops->configure)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		info->ops->configure(channel, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) EXPORT_SYMBOL(dma_configure_channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int dma_xfer(unsigned int chan, unsigned long from,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	     unsigned long to, size_t size, unsigned int mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	channel->sar	= from;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	channel->dar	= to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	channel->count	= size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	channel->mode	= mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	return info->ops->xfer(channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) EXPORT_SYMBOL(dma_xfer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) int dma_extend(unsigned int chan, unsigned long op, void *param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	struct dma_info *info = get_dma_info(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	struct dma_channel *channel = get_dma_channel(chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	if (info->ops->extend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 		return info->ops->extend(channel, op, param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) EXPORT_SYMBOL(dma_extend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int dma_proc_show(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	struct dma_info *info = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	if (list_empty(&registered_dmac_list))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	 * Iterate over each registered DMAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	list_for_each_entry(info, &registered_dmac_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		 * Iterate over each channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		for (i = 0; i < info->nr_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			struct dma_channel *channel = info->channels + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			if (!(channel->flags & DMA_CONFIGURED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 			seq_printf(m, "%2d: %14s    %s\n", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 				   info->name, channel->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) int register_dmac(struct dma_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	unsigned int total_channels, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	INIT_LIST_HEAD(&info->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	       info->name, info->nr_channels, info->nr_channels > 1 ? "s" : "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	info->pdev = platform_device_register_simple(info->name, -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 						     NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	if (IS_ERR(info->pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 		return PTR_ERR(info->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	 * Don't touch pre-configured channels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 		unsigned int size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		size = sizeof(struct dma_channel) * info->nr_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		info->channels = kzalloc(size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 		if (!info->channels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	total_channels = get_nr_channels();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	info->first_vchannel_nr = total_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	for (i = 0; i < info->nr_channels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 		struct dma_channel *chan = &info->channels[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		atomic_set(&chan->busy, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		chan->chan  = info->first_channel_nr + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 		chan->vchan = info->first_channel_nr + i + total_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 		memcpy(chan->dev_id, "Unused", 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 		if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 			chan->flags |= DMA_TEI_CAPABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 		init_waitqueue_head(&chan->wait_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		dma_create_sysfs_files(chan, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	list_add(&info->list, &registered_dmac_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) EXPORT_SYMBOL(register_dmac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) void unregister_dmac(struct dma_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	for (i = 0; i < info->nr_channels; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		dma_remove_sysfs_files(info->channels + i, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	if (!(info->flags & DMAC_CHANNELS_CONFIGURED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		kfree(info->channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	list_del(&info->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	platform_device_unregister(info->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) EXPORT_SYMBOL(unregister_dmac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static int __init dma_api_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	printk(KERN_NOTICE "DMA: Registering DMA API.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	return proc_create_single("dma", 0, NULL, dma_proc_show) ? 0 : -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) subsys_initcall(dma_api_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) MODULE_DESCRIPTION("DMA API for SuperH");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) MODULE_LICENSE("GPL v2");