^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * SH generic board support, using device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static void dummy_smp_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static void dummy_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static void dummy_start_cpu(unsigned int cpu, unsigned long entry_point)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static unsigned int dummy_smp_processor_id(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static void dummy_send_ipi(unsigned int cpu, unsigned int message)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct plat_smp_ops dummy_smp_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .smp_setup = dummy_smp_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .prepare_cpus = dummy_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .start_cpu = dummy_start_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .smp_processor_id = dummy_smp_processor_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .send_ipi = dummy_send_ipi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .cpu_die = native_cpu_die,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .cpu_disable = native_cpu_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .play_dead = native_play_dead,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern const struct of_cpu_method __cpu_method_of_table[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) const struct of_cpu_method __cpu_method_of_table_sentinel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) __section("__cpu_method_of_table_end");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void sh_of_smp_probe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) const char *method = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) const struct of_cpu_method *m = __cpu_method_of_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) pr_info("SH generic board support: scanning for cpus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) init_cpu_possible(cpumask_of(0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) for_each_of_cpu_node(np) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) const __be32 *cell = of_get_property(np, "reg", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u64 id = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (cell) id = of_read_number(cell, of_n_addr_cells(np));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (id < NR_CPUS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) if (!method)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) of_property_read_string(np, "enable-method", &method);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) set_cpu_possible(id, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) set_cpu_present(id, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) __cpu_number_map[id] = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) __cpu_logical_map[id] = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if (!method) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) np = of_find_node_by_name(NULL, "cpus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) of_property_read_string(np, "enable-method", &method);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pr_info("CPU enable method: %s\n", method);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (method)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) for (; m->method; m++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (!strcmp(m->method, method)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) register_smp_ops(m->ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) register_smp_ops(&dummy_smp_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static void sh_of_smp_probe(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void noop(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int noopi(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static void __init sh_of_mem_reserve(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) early_init_fdt_reserve_self();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) early_init_fdt_scan_reserved_mem();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void __init sh_of_setup(char **cmdline_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct device_node *root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sh_mv.mv_name = "Unknown SH model";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) root = of_find_node_by_path("/");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (root) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) of_property_read_string(root, "model", &sh_mv.mv_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) of_node_put(root);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) sh_of_smp_probe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static int sh_of_irq_demux(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* FIXME: eventually this should not be used at all;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * the interrupt controller should set_handle_irq(). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static void __init sh_of_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pr_info("SH generic board support: scanning for interrupt controllers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) irqchip_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int __init sh_of_clk_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #ifdef CONFIG_COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Disabled pending move to COMMON_CLK framework. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) pr_info("SH generic board support: scanning for clk providers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) of_clk_init(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static struct sh_machine_vector __initmv sh_of_generic_mv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .mv_setup = sh_of_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .mv_name = "devicetree", /* replaced by DT root's model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .mv_irq_demux = sh_of_irq_demux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .mv_init_irq = sh_of_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .mv_clk_init = sh_of_clk_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .mv_mode_pins = noopi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .mv_mem_init = noop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .mv_mem_reserve = sh_of_mem_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct sh_clk_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void __init __weak arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) void __init __weak plat_irq_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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