^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/sh/boards/mach-x3proto/ilsel.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Helper routines for SH-X3 proto board ILSEL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2007 - 2010 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/bitmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <mach/ilsel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * ILSEL is split across:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * ILSEL0 - 0xb8100004 [ Levels 1 - 4 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * ILSEL1 - 0xb8100006 [ Levels 5 - 8 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * ILSEL2 - 0xb8100008 [ Levels 9 - 12 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * ILSEL3 - 0xb810000a [ Levels 13 - 15 ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * With each level being relative to an ilsel_source_t.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ILSEL_BASE 0xb8100004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ILSEL_LEVELS 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * ILSEL level map, in descending order from the highest level down.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Supported levels are 1 - 15 spread across ILSEL0 - ILSEL4, mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * directly to IRLs. As the IRQs are numbered in reverse order relative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * to the interrupt level, the level map is carefully managed to ensure a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * 1:1 mapping between the bit position and the IRQ number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * This careful constructions allows ilsel_enable*() to be referenced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * directly for hooking up an ILSEL set and getting back an IRQ which can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * subsequently be used for internal accounting in the (optional) disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * path.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static unsigned long ilsel_level_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static inline unsigned int ilsel_offset(unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return ILSEL_LEVELS - bit - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static inline unsigned long mk_ilsel_addr(unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static inline unsigned int mk_ilsel_shift(unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return (ilsel_offset(bit) & 0x3) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int tmp, shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) pr_notice("enabling ILSEL set %d\n", set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) addr = mk_ilsel_addr(bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) shift = mk_ilsel_shift(bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) __func__, bit, addr, shift, set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) tmp = __raw_readw(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) tmp &= ~(0xf << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) tmp |= set << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) __raw_writew(tmp, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * ilsel_enable - Enable an ILSEL set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Enables a given non-aliased ILSEL source (<= ILSEL_KEY) at the highest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * available interrupt level. Callers should take care to order callsites
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * noting descending interrupt levels. Aliasing FPGA and external board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * IRQs need to use ilsel_enable_fixed().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * The return value is an IRQ number that can later be taken down with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * ilsel_disable().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int ilsel_enable(ilsel_source_t set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) unsigned int bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (unlikely(set > ILSEL_KEY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) pr_err("Aliased sources must use ilsel_enable_fixed()\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) } while (test_and_set_bit(bit, &ilsel_level_map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) __ilsel_enable(set, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) EXPORT_SYMBOL_GPL(ilsel_enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * ilsel_enable_fixed - Enable an ILSEL set at a fixed interrupt level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * @level: Interrupt level (1 - 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Enables a given ILSEL source at a fixed interrupt level. Necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * both for level reservation as well as for aliased sources that only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * exist on special ILSEL#s.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Returns an IRQ number (as ilsel_enable()).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int ilsel_enable_fixed(ilsel_source_t set, unsigned int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int bit = ilsel_offset(level - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (test_and_set_bit(bit, &ilsel_level_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) __ilsel_enable(set, bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) EXPORT_SYMBOL_GPL(ilsel_enable_fixed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * ilsel_disable - Disable an ILSEL set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * @irq: Bit position for ILSEL set value (retval from enable routines)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * Disable a previously enabled ILSEL set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) void ilsel_disable(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned long addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pr_notice("disabling ILSEL set %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) addr = mk_ilsel_addr(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) tmp = __raw_readw(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) tmp &= ~(0xf << mk_ilsel_shift(irq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) __raw_writew(tmp, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) clear_bit(irq, &ilsel_level_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) EXPORT_SYMBOL_GPL(ilsel_disable);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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