^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/sh/boards/mach-x3proto/gpio.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Renesas SH-X3 Prototype Baseboard GPIO Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010 - 2012 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/gpio/driver.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/ilsel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define KEYCTLR 0xb81c0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define KEYOUTR 0xb81c0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define KEYDETR 0xb81c0004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static DEFINE_SPINLOCK(x3proto_gpio_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static struct irq_domain *x3proto_irq_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) spin_lock_irqsave(&x3proto_gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) data = __raw_readw(KEYCTLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) data |= (1 << gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) __raw_writew(data, KEYCTLR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return !!(__raw_readw(KEYDETR) & (1 << gpio));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if (gpio < chip->ngpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) virq = irq_create_mapping(x3proto_irq_domain, gpio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) virq = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return virq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void x3proto_gpio_irq_handler(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) struct irq_data *data = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct irq_chip *chip = irq_data_get_irq_chip(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned long mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) chip->irq_mask_ack(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) mask = __raw_readw(KEYDETR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) generic_handle_irq(irq_linear_revmap(x3proto_irq_domain, pin));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) chip->irq_unmask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct gpio_chip x3proto_gpio_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .label = "x3proto-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .direction_input = x3proto_gpio_direction_input,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .get = x3proto_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .to_irq = x3proto_gpio_to_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .base = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .ngpio = NR_BASEBOARD_GPIOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) irq_hw_number_t hwirq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "gpio");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct irq_domain_ops x3proto_gpio_irq_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .map = x3proto_gpio_irq_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .xlate = irq_domain_xlate_twocell,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int __init x3proto_gpio_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int ilsel, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ilsel = ilsel_enable(ILSEL_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (unlikely(ilsel < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return ilsel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ret = gpiochip_add_data(&x3proto_gpio_chip, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (unlikely(ret))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) goto err_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) &x3proto_gpio_irq_ops, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (unlikely(!x3proto_irq_domain))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) pr_info("registering '%s' support, handling GPIOs %u -> %u, "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) "bound to IRQ %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) x3proto_gpio_chip.label, x3proto_gpio_chip.base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ilsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) irq_set_chained_handler(ilsel, x3proto_gpio_irq_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) irq_set_irq_wake(ilsel, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) gpiochip_remove(&x3proto_gpio_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) err_gpio:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) synchronize_irq(ilsel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ilsel_disable(ILSEL_KEY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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