Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * SDK7786 FPGA NMI Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2010  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <mach/fpga.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	NMI_MODE_MANUAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	NMI_MODE_AUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	NMI_MODE_MASKED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	NMI_MODE_ANY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	NMI_MODE_UNKNOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * Default to the manual NMI switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static unsigned int __initdata nmi_mode = NMI_MODE_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int __init nmi_mode_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	if (!str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	if (strcmp(str, "manual") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		nmi_mode = NMI_MODE_MANUAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	else if (strcmp(str, "aux") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		nmi_mode = NMI_MODE_AUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	else if (strcmp(str, "masked") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		nmi_mode = NMI_MODE_MASKED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	else if (strcmp(str, "any") == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		nmi_mode = NMI_MODE_ANY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		nmi_mode = NMI_MODE_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		pr_warn("Unknown NMI mode %s\n", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	printk("Set NMI mode to %d\n", nmi_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) early_param("nmi_mode", nmi_mode_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void __init sdk7786_nmi_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	unsigned int source, mask, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	switch (nmi_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	case NMI_MODE_MANUAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		source = NMISR_MAN_NMI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		mask = NMIMR_MAN_NMIM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	case NMI_MODE_AUX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		source = NMISR_AUX_NMI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		mask = NMIMR_AUX_NMIM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	case NMI_MODE_ANY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		source = NMISR_MAN_NMI | NMISR_AUX_NMI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		mask = NMIMR_MAN_NMIM | NMIMR_AUX_NMIM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	case NMI_MODE_MASKED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	case NMI_MODE_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		source = mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	/* Set the NMI source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	tmp = fpga_read_reg(NMISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	tmp &= ~NMISR_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	tmp |= source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	fpga_write_reg(tmp, NMISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	/* And the IRQ masking */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	fpga_write_reg(NMIMR_MASK ^ mask, NMIMR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }