Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/arch/sh/boards/renesas/sdk7780/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Renesas Technology Europe SDK7780 Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2008  Nicholas Beck <nbeck@mpc-data.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <mach/sdk7780.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	UNUSED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	/* board specific interrupt sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	SMC91C111,	/* Ethernet controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static struct intc_vect fpga_vectors[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	INTC_IRQ(SMC91C111, IRQ_ETHERNET),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static struct intc_mask_reg fpga_mask_registers[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	{ 0, FPGA_IRQ0MR, 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	  { 0, 0, 0, 0, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	    0, 0, 0, SMC91C111, 0, 0, 0, 0 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 			 NULL, fpga_mask_registers, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void __init init_sdk7780_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	__raw_writew(0xFFFF, FPGA_IRQ0MR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	/* Setup IRL 0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	__raw_writew(0x0003, FPGA_IMSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	plat_irq_setup_pins(IRQ_MODE_IRL3210);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	register_intc_controller(&fpga_intc_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }