^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/sh/boards/renesas/rts7751r2d/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007 Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2000 Kazumoto Kojima
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Renesas Technology Sales RTS7751R2D Support, R2D-PLUS and R2D-1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Modified for RTS7751R2D by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Atom Create Engineering Co., Ltd. 2002.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <mach/r2d.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define R2D_NR_IRL 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) UNUSED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* board specific interrupt sources (R2D-1 and R2D-PLUS) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) EXT, /* EXT_INT0-3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) RTC_T, RTC_A, /* Real Time Clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) AX88796, /* Ethernet controller (R2D-1 board) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) KEY, /* Key input (R2D-PLUS board) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SDCARD, /* SD Card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) CF_CD, CF_IDE, /* CF Card Detect + CF IDE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SM501, /* SM501 aka Voyager */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) PCI_INTD_RTL8139, /* Ethernet controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) PCI_INTC_PCI1520, /* Cardbus/PCMCIA bridge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) PCI_INTB_RTL8139, /* Ethernet controller with HUB (R2D-PLUS board) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) PCI_INTB_SLOT, /* PCI Slot 3.3v (R2D-1 board) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) PCI_INTA_SLOT, /* PCI Slot 3.3v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) TP, /* Touch Panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifdef CONFIG_RTS7751R2D_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* Vectors for R2D-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct intc_vect vectors_r2d_1[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) INTC_IRQ(EXT, IRQ_EXT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) INTC_IRQ(AX88796, IRQ_AX88796), INTC_IRQ(SDCARD, IRQ_SDCARD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE), /* ng */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) INTC_IRQ(SM501, IRQ_VOYAGER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) INTC_IRQ(PCI_INTB_SLOT, IRQ_PCI_INTB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) INTC_IRQ(TP, IRQ_TP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* IRLMSK mask register layout for R2D-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static struct intc_mask_reg mask_registers_r2d_1[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { 0xa4000000, 0, 16, /* IRLMSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { TP, PCI_INTA_SLOT, PCI_INTB_SLOT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) PCI_INTC_PCI1520, PCI_INTD_RTL8139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) SM501, CF_IDE, CF_CD, SDCARD, AX88796,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) RTC_A, RTC_T, 0, 0, 0, EXT } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* IRLn to IRQ table for R2D-1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) IRQ_VOYAGER, IRQ_AX88796, IRQ_RTC_A, IRQ_RTC_T,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) IRQ_TP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) NULL, mask_registers_r2d_1, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif /* CONFIG_RTS7751R2D_1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #ifdef CONFIG_RTS7751R2D_PLUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Vectors for R2D-PLUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static struct intc_vect vectors_r2d_plus[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) INTC_IRQ(EXT, IRQ_EXT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) INTC_IRQ(KEY, IRQ_KEY), INTC_IRQ(SDCARD, IRQ_SDCARD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) INTC_IRQ(SM501, IRQ_VOYAGER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) INTC_IRQ(PCI_INTB_RTL8139, IRQ_PCI_INTB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) INTC_IRQ(TP, IRQ_TP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* IRLMSK mask register layout for R2D-PLUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static struct intc_mask_reg mask_registers_r2d_plus[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) { 0xa4000000, 0, 16, /* IRLMSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { TP, PCI_INTA_SLOT, PCI_INTB_RTL8139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) PCI_INTC_PCI1520, PCI_INTD_RTL8139,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) SM501, CF_IDE, CF_CD, SDCARD, KEY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) RTC_A, RTC_T, 0, 0, 0, EXT } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* IRLn to IRQ table for R2D-PLUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) IRQ_VOYAGER, IRQ_KEY, IRQ_RTC_A, IRQ_RTC_T,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) IRQ_TP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) NULL, mask_registers_r2d_plus, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #endif /* CONFIG_RTS7751R2D_PLUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static unsigned char irl2irq[R2D_NR_IRL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int rts7751r2d_irq_demux(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (irq >= R2D_NR_IRL || irq < 0 || !irl2irq[irq])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return irl2irq[irq];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * Initialize IRQ setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) void __init init_rts7751r2d_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct intc_desc *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) switch (__raw_readw(PA_VERREG) & 0xf0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #ifdef CONFIG_RTS7751R2D_PLUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) case 0x10:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) d = &intc_desc_r2d_plus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) memcpy(irl2irq, irl2irq_r2d_plus, R2D_NR_IRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #ifdef CONFIG_RTS7751R2D_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) case 0x00: /* according to manual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case 0x30: /* in reality */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) printk(KERN_INFO "Using R2D-1 interrupt controller.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) d = &intc_desc_r2d_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) memcpy(irl2irq, irl2irq_r2d_1, R2D_NR_IRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) __raw_readw(PA_VERREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) register_intc_controller(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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