^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/sh/boards/superh/microdev/setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2003, 2004 SuperH, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2004, 2005 Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * SuperH SH4-202 MicroDev board support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <video/s1d13xxxfb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <mach/microdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .start = 0x300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .end = 0x300 + SZ_4K - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) .start = MICRODEV_LINUX_IRQ_ETHERNET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .end = MICRODEV_LINUX_IRQ_ETHERNET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .num_resources = ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .resource = smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct s1d13xxxfb_regval s1d13806_initregs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { S1DREG_MISC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { S1DREG_COM_DISP_MODE, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { S1DREG_GPIO_CNF0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { S1DREG_GPIO_CNF1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) { S1DREG_GPIO_CTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) { S1DREG_GPIO_CTL1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) { S1DREG_CLK_CNF, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { S1DREG_LCD_CLK_CNF, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { S1DREG_CRT_CLK_CNF, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { S1DREG_MPLUG_CLK_CNF, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { S1DREG_CPU2MEM_WST_SEL, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { S1DREG_SDRAM_REF_RATE, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) { S1DREG_SDRAM_TC0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { S1DREG_SDRAM_TC1, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { S1DREG_MEM_CNF, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { S1DREG_PANEL_TYPE, 0x25 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { S1DREG_MOD_RATE, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { S1DREG_LCD_DISP_HWIDTH, 0x63 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { S1DREG_LCD_NDISP_HPER, 0x1e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { S1DREG_TFT_FPLINE_START, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { S1DREG_TFT_FPLINE_PWIDTH, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { S1DREG_LCD_DISP_VHEIGHT0, 0x57 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { S1DREG_LCD_DISP_VHEIGHT1, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { S1DREG_LCD_NDISP_VPER, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { S1DREG_TFT_FPFRAME_START, 0x0a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { S1DREG_TFT_FPFRAME_PWIDTH, 0x81 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { S1DREG_LCD_DISP_MODE, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { S1DREG_LCD_MISC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { S1DREG_LCD_DISP_START0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { S1DREG_LCD_DISP_START1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { S1DREG_LCD_DISP_START2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { S1DREG_LCD_MEM_OFF0, 0x90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { S1DREG_LCD_MEM_OFF1, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { S1DREG_LCD_PIX_PAN, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { S1DREG_LCD_DISP_FIFO_HTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { S1DREG_LCD_DISP_FIFO_LTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { S1DREG_CRT_DISP_HWIDTH, 0x63 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { S1DREG_CRT_NDISP_HPER, 0x1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { S1DREG_CRT_HRTC_START, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { S1DREG_CRT_HRTC_PWIDTH, 0x8f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { S1DREG_CRT_DISP_VHEIGHT0, 0x57 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { S1DREG_CRT_DISP_VHEIGHT1, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { S1DREG_CRT_NDISP_VPER, 0x1b },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { S1DREG_CRT_VRTC_START, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { S1DREG_CRT_VRTC_PWIDTH, 0x83 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) { S1DREG_TV_OUT_CTL, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) { S1DREG_CRT_DISP_MODE, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) { S1DREG_CRT_DISP_START0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { S1DREG_CRT_DISP_START1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { S1DREG_CRT_DISP_START2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { S1DREG_CRT_MEM_OFF0, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { S1DREG_CRT_MEM_OFF1, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { S1DREG_CRT_PIX_PAN, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { S1DREG_CRT_DISP_FIFO_HTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { S1DREG_CRT_DISP_FIFO_LTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) { S1DREG_LCD_CUR_CTL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { S1DREG_LCD_CUR_START, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) { S1DREG_LCD_CUR_XPOS0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) { S1DREG_LCD_CUR_XPOS1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { S1DREG_LCD_CUR_YPOS0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { S1DREG_LCD_CUR_YPOS1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { S1DREG_LCD_CUR_BCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { S1DREG_LCD_CUR_GCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { S1DREG_LCD_CUR_RCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { S1DREG_LCD_CUR_BCTL1, 0x1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { S1DREG_LCD_CUR_GCTL1, 0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { S1DREG_LCD_CUR_RCTL1, 0x1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { S1DREG_LCD_CUR_FIFO_HTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { S1DREG_CRT_CUR_CTL, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { S1DREG_CRT_CUR_START, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { S1DREG_CRT_CUR_XPOS0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { S1DREG_CRT_CUR_XPOS1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { S1DREG_CRT_CUR_YPOS0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { S1DREG_CRT_CUR_YPOS1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { S1DREG_CRT_CUR_BCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { S1DREG_CRT_CUR_GCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { S1DREG_CRT_CUR_RCTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { S1DREG_CRT_CUR_BCTL1, 0x1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { S1DREG_CRT_CUR_GCTL1, 0x3f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { S1DREG_CRT_CUR_RCTL1, 0x1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { S1DREG_CRT_CUR_FIFO_HTC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { S1DREG_BBLT_CTL0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { S1DREG_BBLT_CTL1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { S1DREG_BBLT_CC_EXP, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { S1DREG_BBLT_OP, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { S1DREG_BBLT_SRC_START0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { S1DREG_BBLT_SRC_START1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { S1DREG_BBLT_SRC_START2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { S1DREG_BBLT_DST_START0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { S1DREG_BBLT_DST_START1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { S1DREG_BBLT_DST_START2, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { S1DREG_BBLT_MEM_OFF0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { S1DREG_BBLT_MEM_OFF1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { S1DREG_BBLT_WIDTH0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { S1DREG_BBLT_WIDTH1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { S1DREG_BBLT_HEIGHT0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { S1DREG_BBLT_HEIGHT1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { S1DREG_BBLT_BGC0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { S1DREG_BBLT_BGC1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { S1DREG_BBLT_FGC0, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { S1DREG_BBLT_FGC1, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { S1DREG_LKUP_MODE, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { S1DREG_LKUP_ADDR, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { S1DREG_PS_CNF, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { S1DREG_PS_STATUS, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { S1DREG_CPU2MEM_WDOGT, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { S1DREG_COM_DISP_MODE, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static struct s1d13xxxfb_pdata s1d13806_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .initregs = s1d13806_initregs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .initregssize = ARRAY_SIZE(s1d13806_initregs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static struct resource s1d13806_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .start = 0x07200000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .end = 0x07200000 + SZ_2M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .start = 0x07000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .end = 0x07000000 + SZ_2M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static struct platform_device s1d13806_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .name = "s1d13806fb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .num_resources = ARRAY_SIZE(s1d13806_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .resource = s1d13806_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .platform_data = &s1d13806_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static struct platform_device *microdev_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) &smc91x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) &s1d13806_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static int __init microdev_devices_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) device_initcall(microdev_devices_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * The Machine Vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static struct sh_machine_vector mv_sh4202_microdev __initmv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .mv_name = "SH4-202 MicroDev",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .mv_ioport_map = microdev_ioport_map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .mv_init_irq = init_microdev_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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