^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * KFR2R09 board support code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2009 Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <cpu/sh7724.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clkdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/input/sh_keysc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/mfd/tmio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/mmc/host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/platform_data/lv5207lp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/sh_intc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/usb/r8a66597.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <mach/kfr2r09.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <media/drv-intf/renesas-ceu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <media/i2c/rj54n1cb0c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <video/sh_mobile_lcdc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define CEU_BUFFER_MEMORY_SIZE (4 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static phys_addr_t ceu_dma_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* set VIO_CKO clock to 25MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define CEU_MCLK_FREQ 25000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DRVCRB 0xA405018C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static struct mtd_partition kfr2r09_nor_flash_partitions[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .name = "boot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .size = (4 * 1024 * 1024),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .mask_flags = MTD_WRITEABLE, /* Read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .name = "other",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct physmap_flash_data kfr2r09_nor_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .parts = kfr2r09_nor_flash_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static struct resource kfr2r09_nor_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = "NOR Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .start = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .end = 0x03ffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static struct platform_device kfr2r09_nor_flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .resource = kfr2r09_nor_flash_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .platform_data = &kfr2r09_nor_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static struct resource kfr2r09_nand_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .name = "NAND Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .start = 0x10000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .end = 0x1001ffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static struct platform_device kfr2r09_nand_flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .name = "onenand-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .resource = kfr2r09_nand_flash_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct sh_keysc_info kfr2r09_sh_keysc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .scan_timing = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .delay = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .keycodes = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) KEY_1, KEY_2, KEY_3, 0, KEY_UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 0, 0, 0, 0, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static struct resource kfr2r09_sh_keysc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .name = "KEYSC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .start = 0x044b0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .end = 0x044b000f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .start = evt2irq(0xbe0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct platform_device kfr2r09_sh_keysc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .name = "sh_keysc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .id = 0, /* "keysc0" clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .resource = kfr2r09_sh_keysc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .platform_data = &kfr2r09_sh_keysc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static const struct fb_videomode kfr2r09_lcdc_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .name = "TX07D34VM0AAA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .xres = 240,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .yres = 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .left_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .right_margin = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .hsync_len = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .upper_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .lower_margin = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .vsync_len = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .clock_source = LCDC_CLK_BUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .ch[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .chan = LCDC_CHAN_MAINLCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .fourcc = V4L2_PIX_FMT_RGB565,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .interface_type = SYS18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .clock_divider = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .flags = LCDC_FLAGS_DWPOL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .lcd_modes = kfr2r09_lcdc_modes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .num_modes = ARRAY_SIZE(kfr2r09_lcdc_modes),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .panel_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .width = 35,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .height = 58,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .setup_sys = kfr2r09_lcd_setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .start_transfer = kfr2r09_lcd_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .sys_bus_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .ldmt2r = 0x07010904,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .ldmt3r = 0x14012914,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* set 1s delay to encourage fsync() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .deferred_io_msec = 1000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static struct resource kfr2r09_sh_lcdc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .name = "LCDC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .start = 0xfe940000, /* P4-only space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .end = 0xfe942fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .start = evt2irq(0xf40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static struct platform_device kfr2r09_sh_lcdc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .name = "sh_mobile_lcdc_fb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .resource = kfr2r09_sh_lcdc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .platform_data = &kfr2r09_sh_lcdc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static struct lv5207lp_platform_data kfr2r09_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .fbdev = &kfr2r09_sh_lcdc_device.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .def_value = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .max_value = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) static struct i2c_board_info kfr2r09_backlight_board_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) I2C_BOARD_INFO("lv5207lp", 0x75),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .platform_data = &kfr2r09_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .on_chip = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static struct resource kfr2r09_usb0_gadget_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .start = 0x04d80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) .end = 0x04d80123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .start = evt2irq(0xa20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .end = evt2irq(0xa20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static struct platform_device kfr2r09_usb0_gadget_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .name = "r8a66597_udc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .dma_mask = NULL, /* not use dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .platform_data = &kfr2r09_usb0_gadget_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .num_resources = ARRAY_SIZE(kfr2r09_usb0_gadget_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .resource = kfr2r09_usb0_gadget_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static struct ceu_platform_data ceu_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .num_subdevs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .subdevs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) { /* [0] = rj54n1cb0c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .bus_width = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .bus_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .i2c_adapter_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .i2c_address = 0x50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static struct resource kfr2r09_ceu_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) .name = "CEU",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .start = 0xfe910000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .end = 0xfe91009f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .start = evt2irq(0x880),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) .end = evt2irq(0x880),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static struct platform_device kfr2r09_ceu_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .name = "renesas-ceu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .id = 0, /* "ceu0" clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .num_resources = ARRAY_SIZE(kfr2r09_ceu_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .resource = kfr2r09_ceu_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .platform_data = &ceu_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static struct rj54n1_pdata rj54n1_priv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) .mclk_freq = CEU_MCLK_FREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) .ioctl_high = false,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static struct i2c_board_info kfr2r09_i2c_camera = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) I2C_BOARD_INFO("rj54n1cb0c", 0x50),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .platform_data = &rj54n1_priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static struct gpiod_lookup_table rj54n1_gpios = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .dev_id = "1-0050",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) GPIO_LOOKUP("sh7724_pfc", GPIO_PTB4, "poweron",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7, "enable",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /* Fixed 3.3V regulator to be used by SDHI0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static struct regulator_consumer_supply fixed3v3_power_consumers[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static struct resource kfr2r09_sh_sdhi0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .name = "SDHI0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .start = 0x04ce0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) .end = 0x04ce00ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .start = evt2irq(0xe80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static struct tmio_mmc_data sh7724_sdhi0_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .capabilities = MMC_CAP_SDIO_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) static struct platform_device kfr2r09_sh_sdhi0_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .name = "sh_mobile_sdhi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .num_resources = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .resource = kfr2r09_sh_sdhi0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .platform_data = &sh7724_sdhi0_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static struct platform_device *kfr2r09_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) &kfr2r09_nor_flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) &kfr2r09_nand_flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) &kfr2r09_sh_keysc_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) &kfr2r09_sh_lcdc_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) &kfr2r09_sh_sdhi0_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define BSC_CS0BCR 0xfec10004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define BSC_CS0WCR 0xfec10024
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define BSC_CS4BCR 0xfec10010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define BSC_CS4WCR 0xfec10030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #define PORT_MSELCRB 0xa4050182
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #ifdef CONFIG_I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) static int kfr2r09_usb0_gadget_i2c_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) struct i2c_adapter *a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) struct i2c_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) a = i2c_get_adapter(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (!a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* set bit 1 (the second bit) of chip at 0x09, register 0x13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) buf[0] = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) msg.len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) msg.len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) msg.flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) buf[1] = buf[0] | (1 << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) buf[0] = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) msg.len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) static int kfr2r09_serial_i2c_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct i2c_adapter *a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct i2c_msg msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) unsigned char buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) a = i2c_get_adapter(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (!a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) /* set bit 6 (the 7th bit) of chip at 0x09, register 0x13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) buf[0] = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) msg.len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) buf[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) msg.len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) msg.flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) buf[1] = buf[0] | (1 << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) buf[0] = 0x13;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) msg.addr = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) msg.buf = buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) msg.len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) msg.flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) ret = i2c_transfer(a, &msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int kfr2r09_usb0_gadget_i2c_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static int kfr2r09_serial_i2c_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static int kfr2r09_usb0_gadget_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int plugged_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) gpio_request(GPIO_PTN4, NULL); /* USB_DET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) gpio_direction_input(GPIO_PTN4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) plugged_in = gpio_get_value(GPIO_PTN4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (!plugged_in)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) return -ENODEV; /* no cable plugged in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) if (kfr2r09_usb0_gadget_i2c_setup() != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return -ENODEV; /* unable to configure using i2c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) gpio_request(GPIO_FN_PDSTATUS, NULL); /* R-standby disables USB clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) gpio_request(GPIO_PTV6, NULL); /* USBCLK_ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) gpio_direction_output(GPIO_PTV6, 1); /* USBCLK_ON = H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) msleep(20); /* wait 20ms to let the clock settle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) clk_enable(clk_get(NULL, "usb0"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) __raw_writew(0x0600, 0xa40501d4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) extern char kfr2r09_sdram_enter_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) extern char kfr2r09_sdram_enter_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) extern char kfr2r09_sdram_leave_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) extern char kfr2r09_sdram_leave_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static int __init kfr2r09_devices_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct clk *camera_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* register board specific self-refresh code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) SUSP_SH_RSTANDBY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) &kfr2r09_sdram_enter_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) &kfr2r09_sdram_enter_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) &kfr2r09_sdram_leave_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) &kfr2r09_sdram_leave_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /* enable SCIF1 serial port for YC401 console support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) gpio_request(GPIO_FN_SCIF1_RXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) gpio_request(GPIO_FN_SCIF1_TXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) kfr2r09_serial_i2c_setup(); /* ECONTMSK(bit6=L10ONEN) set 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) gpio_request(GPIO_PTG3, NULL); /* HPON_ON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) gpio_direction_output(GPIO_PTG3, 1); /* HPON_ON = H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* setup NOR flash at CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) __raw_writel(0x36db0400, BSC_CS0BCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) __raw_writel(0x00000500, BSC_CS0WCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* setup NAND flash at CS4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) __raw_writel(0x36db0400, BSC_CS4BCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) __raw_writel(0x00000500, BSC_CS4WCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* setup KEYSC pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) gpio_request(GPIO_FN_KEYOUT0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) gpio_request(GPIO_FN_KEYOUT1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) gpio_request(GPIO_FN_KEYOUT2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) gpio_request(GPIO_FN_KEYOUT3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) gpio_request(GPIO_FN_KEYIN0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) gpio_request(GPIO_FN_KEYIN1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) gpio_request(GPIO_FN_KEYIN2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) gpio_request(GPIO_FN_KEYIN3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) gpio_request(GPIO_FN_KEYIN4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* setup LCDC pins for SYS panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) gpio_request(GPIO_FN_LCDD17, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) gpio_request(GPIO_FN_LCDD16, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) gpio_request(GPIO_FN_LCDD15, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) gpio_request(GPIO_FN_LCDD14, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) gpio_request(GPIO_FN_LCDD13, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) gpio_request(GPIO_FN_LCDD12, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) gpio_request(GPIO_FN_LCDD11, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) gpio_request(GPIO_FN_LCDD10, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) gpio_request(GPIO_FN_LCDD9, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) gpio_request(GPIO_FN_LCDD8, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) gpio_request(GPIO_FN_LCDD7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) gpio_request(GPIO_FN_LCDD6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) gpio_request(GPIO_FN_LCDD5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) gpio_request(GPIO_FN_LCDD4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) gpio_request(GPIO_FN_LCDD3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) gpio_request(GPIO_FN_LCDD2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) gpio_request(GPIO_FN_LCDD1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) gpio_request(GPIO_FN_LCDD0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) gpio_direction_output(GPIO_PTE4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) gpio_direction_output(GPIO_PTF4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) gpio_direction_output(GPIO_PTU0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* setup USB function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (kfr2r09_usb0_gadget_setup() == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) platform_device_register(&kfr2r09_usb0_gadget_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) /* CEU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) gpio_request(GPIO_FN_VIO_CKO, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) gpio_request(GPIO_FN_VIO0_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) gpio_request(GPIO_FN_VIO0_VD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) gpio_request(GPIO_FN_VIO0_HD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) gpio_request(GPIO_FN_VIO0_FLD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) gpio_request(GPIO_FN_VIO0_D7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) gpio_request(GPIO_FN_VIO0_D6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) gpio_request(GPIO_FN_VIO0_D5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) gpio_request(GPIO_FN_VIO0_D4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) gpio_request(GPIO_FN_VIO0_D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) gpio_request(GPIO_FN_VIO0_D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) gpio_request(GPIO_FN_VIO0_D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) gpio_request(GPIO_FN_VIO0_D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* SDHI0 connected to yc304 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) gpio_request(GPIO_FN_SDHI0CD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) gpio_request(GPIO_FN_SDHI0D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) gpio_request(GPIO_FN_SDHI0D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) gpio_request(GPIO_FN_SDHI0D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) gpio_request(GPIO_FN_SDHI0D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) gpio_request(GPIO_FN_SDHI0CMD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) gpio_request(GPIO_FN_SDHI0CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) i2c_register_board_info(0, &kfr2r09_backlight_board_info, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* Set camera clock frequency and register and alias for rj54n1. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) camera_clk = clk_get(NULL, "video_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (!IS_ERR(camera_clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) clk_set_rate(camera_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) clk_round_rate(camera_clk, CEU_MCLK_FREQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) clk_put(camera_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) clk_add_alias(NULL, "1-0050", "video_clk", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /* set DRVCRB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * use 1.8 V for VccQ_VIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * use 2.85V for VccQ_SR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) gpiod_add_lookup_table(&rj54n1_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) i2c_register_board_info(1, &kfr2r09_i2c_camera, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Initialize CEU platform device separately to map memory first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) device_initialize(&kfr2r09_ceu_device.dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) dma_declare_coherent_memory(&kfr2r09_ceu_device.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) ceu_dma_membase, ceu_dma_membase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ceu_dma_membase + CEU_BUFFER_MEMORY_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) platform_device_add(&kfr2r09_ceu_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return platform_add_devices(kfr2r09_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ARRAY_SIZE(kfr2r09_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) device_initcall(kfr2r09_devices_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* Return the board specific boot mode pin configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static int kfr2r09_mode_pins(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* MD0=1, MD1=1, MD2=0: Clock Mode 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * MD3=0: 16-bit Area0 Bus Width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * MD5=1: Little Endian
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * MD8=1: Test Mode Disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Reserve a portion of memory for CEU buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static void __init kfr2r09_mv_mem_reserve(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) phys_addr_t phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) phys_addr_t size = CEU_BUFFER_MEMORY_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) phys = memblock_phys_alloc(size, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (!phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) panic("Failed to allocate CEU memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) memblock_free(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) memblock_remove(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ceu_dma_membase = phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * The Machine Vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) static struct sh_machine_vector mv_kfr2r09 __initmv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .mv_name = "kfr2r09",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .mv_mode_pins = kfr2r09_mode_pins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .mv_mem_reserve = kfr2r09_mv_mem_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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