Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Renesas Solutions Highlander R7780RP-1 Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2002  Atom Create Engineering Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2006  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2008  Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <mach/highlander.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	UNUSED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	/* board specific interrupt sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	AX88796,          /* Ethernet controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	PSW,              /* Push Switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	CF,               /* Compact Flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	PCI_A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	PCI_B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	PCI_C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	PCI_D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct intc_vect vectors[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	INTC_IRQ(PCI_B, 66),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	INTC_IRQ(PCI_C, 67),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	INTC_IRQ(PCI_D, 68),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	INTC_IRQ(CF, IRQ_CF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	INTC_IRQ(PSW, IRQ_PSW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	INTC_IRQ(AX88796, IRQ_AX88796),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static struct intc_mask_reg mask_registers[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	{ 0xa5000000, 0, 16, /* IRLMSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	  { PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	    0, 0, 0, 0, 0, 0, PSW, AX88796 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static unsigned char irl2irq[HL_NR_IRL] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	65, 66, 67, 68,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	IRQ_CF, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	IRQ_AX88796, IRQ_PSW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 			 NULL, mask_registers, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned char * __init highlander_plat_irq_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	if (__raw_readw(0xa5000600)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		printk(KERN_INFO "Using r7780rp interrupt controller.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		register_intc_controller(&intc_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		return irl2irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }