Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Renesas Solutions Highlander R7780MP Support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2002  Atom Create Engineering Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2006  Paul Mundt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2007  Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <mach/highlander.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	UNUSED = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	/* board specific interrupt sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	CF,		/* Compact Flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	TP,		/* Touch panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	SCIF1,		/* FPGA SCIF1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	SCIF0,		/* FPGA SCIF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	SMBUS,		/* SMBUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	RTC,		/* RTC Alarm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	AX88796,	/* Ethernet controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	PSW,		/* Push Switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	/* external bus connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	EXT1, EXT2, EXT4, EXT5, EXT6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static struct intc_vect vectors[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	INTC_IRQ(CF, IRQ_CF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	INTC_IRQ(TP, IRQ_TP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	INTC_IRQ(SCIF1, IRQ_SCIF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	INTC_IRQ(SCIF0, IRQ_SCIF0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	INTC_IRQ(SMBUS, IRQ_SMBUS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	INTC_IRQ(RTC, IRQ_RTC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	INTC_IRQ(AX88796, IRQ_AX88796),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	INTC_IRQ(PSW, IRQ_PSW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	INTC_IRQ(EXT6, IRQ_EXT6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static struct intc_mask_reg mask_registers[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	{ 0xa4000000, 0, 16, /* IRLMSK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	  { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	    0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static unsigned char irl2irq[HL_NR_IRL] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	0, IRQ_CF, IRQ_TP, IRQ_SCIF1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	0, IRQ_AX88796, IRQ_PSW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			 NULL, mask_registers, NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned char * __init highlander_plat_irq_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		printk(KERN_INFO "Using r7780mp interrupt controller.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		register_intc_controller(&intc_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		return irl2irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }