^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2009 Renesas Solutions Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Kuninori Morimoto <morimoto.kuninori@renesas.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/heartbeat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <asm/suspend.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <cpu/sh7724.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/input.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/input/sh_keysc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mfd/tmio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/mmc/host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/mmc/sh_mmcif.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/gpio_backlight.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/platform_data/tsc2007.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/sh_eth.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/sh_intc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/spi/mmc_spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/spi/sh_msiof.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/usb/r8a66597.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/usb/renesas_usbhs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/videodev2.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/dma-map-ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <media/drv-intf/renesas-ceu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <media/i2c/mt9t112.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <media/i2c/tw9910.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <sound/sh_fsi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <sound/simple_card.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <video/sh_mobile_lcdc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Address Interface BusWidth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) *-----------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * 0x0000_0000 uboot 16bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * 0x0004_0000 Linux romImage 16bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * 0x0014_0000 MTD for Linux 16bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * 0x0400_0000 Internal I/O 16/32bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * 0x0800_0000 DRAM 32bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * 0x1800_0000 MFI 16bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* SWITCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * DS2[1] = FlashROM write protect ON : write protect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * OFF : No write protect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * DS2[2] = RMII / TS, SCIF ON : RMII
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * OFF : TS, SCIF3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * DS2[3] = Camera / Video ON : Camera
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * OFF : NTSC/PAL (IN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * DS2[5] = NTSC_OUT Clock ON : On board OSC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * OFF : SH7724 DV_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * DS2[6-7] = MMC / SD ON-OFF : SD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * OFF-ON : MMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * FSI - DA7210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * it needs amixer settings for playing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * amixer set 'HeadPhone' 80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * amixer set 'Out Mixer Left DAC Left' on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * amixer set 'Out Mixer Right DAC Right' on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define CEU_BUFFER_MEMORY_SIZE (4 << 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static phys_addr_t ceu0_dma_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static phys_addr_t ceu1_dma_membase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Heartbeat */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static unsigned char led_pos[] = { 0, 1, 2, 3 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static struct heartbeat_data heartbeat_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .nr_bits = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .bit_pos = led_pos,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static struct resource heartbeat_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .start = 0xA405012C, /* PTG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .end = 0xA405012E - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) static struct platform_device heartbeat_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .name = "heartbeat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .platform_data = &heartbeat_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .resource = &heartbeat_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /* MTD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static struct mtd_partition nor_flash_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) .name = "boot loader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .size = (5 * 1024 * 1024),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .mask_flags = MTD_WRITEABLE, /* force read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .name = "free-area",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static struct physmap_flash_data nor_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .parts = nor_flash_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .nr_parts = ARRAY_SIZE(nor_flash_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static struct resource nor_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .name = "NOR Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .start = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .end = 0x03ffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static struct platform_device nor_flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .resource = nor_flash_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .num_resources = ARRAY_SIZE(nor_flash_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .platform_data = &nor_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* SH Eth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define SH_ETH_ADDR (0xA4600000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static struct resource sh_eth_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .start = SH_ETH_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .end = SH_ETH_ADDR + 0x1FC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .start = evt2irq(0xd60),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) static struct sh_eth_plat_data sh_eth_plat = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .phy = 0x1f, /* SMSC LAN8700 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .phy_interface = PHY_INTERFACE_MODE_MII,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .ether_link_active_low = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static struct platform_device sh_eth_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .name = "sh7724-ether",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .platform_data = &sh_eth_plat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .num_resources = ARRAY_SIZE(sh_eth_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .resource = sh_eth_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* USB0 host */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void usb0_port_power(int port, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) gpio_set_value(GPIO_PTB4, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static struct r8a66597_platdata usb0_host_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .on_chip = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .port_power = usb0_port_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static struct resource usb0_host_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .start = 0xa4d80000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .end = 0xa4d80124 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .start = evt2irq(0xa20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .end = evt2irq(0xa20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static struct platform_device usb0_host_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .name = "r8a66597_hcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .dma_mask = NULL, /* not use dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .platform_data = &usb0_host_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .num_resources = ARRAY_SIZE(usb0_host_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .resource = usb0_host_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /* USB1 host/function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static void usb1_port_power(int port, int power)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) gpio_set_value(GPIO_PTB5, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static struct r8a66597_platdata usb1_common_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) .on_chip = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) .port_power = usb1_port_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static struct resource usb1_common_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) .start = 0xa4d90000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) .end = 0xa4d90124 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .start = evt2irq(0xa40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .end = evt2irq(0xa40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static struct platform_device usb1_common_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) /* .name will be added in arch_setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) .dma_mask = NULL, /* not use dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .platform_data = &usb1_common_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) .num_resources = ARRAY_SIZE(usb1_common_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .resource = usb1_common_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * USBHS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int usbhs_get_id(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) return gpio_get_value(GPIO_PTB3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) static int usbhs_phy_reset(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* enable vbus if HOST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) if (!gpio_get_value(GPIO_PTB3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) gpio_set_value(GPIO_PTB5, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static struct renesas_usbhs_platform_info usbhs_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .platform_callback = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .get_id = usbhs_get_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .phy_reset = usbhs_phy_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .driver_param = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .buswait_bwait = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .detection_delay = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .d0_tx_id = SHDMA_SLAVE_USB1D0_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .d0_rx_id = SHDMA_SLAVE_USB1D0_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .d1_tx_id = SHDMA_SLAVE_USB1D1_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) .d1_rx_id = SHDMA_SLAVE_USB1D1_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static struct resource usbhs_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) .start = 0xa4d90000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) .end = 0xa4d90124 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) .start = evt2irq(0xa40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .end = evt2irq(0xa40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static struct platform_device usbhs_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .name = "renesas_usbhs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .dma_mask = NULL, /* not use dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .platform_data = &usbhs_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .num_resources = ARRAY_SIZE(usbhs_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .resource = usbhs_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* LCDC and backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) static const struct fb_videomode ecovec_lcd_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) .name = "Panel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .xres = 800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .left_margin = 220,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .right_margin = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) .hsync_len = 70,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .upper_margin = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .lower_margin = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .vsync_len = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .sync = 0, /* hsync and vsync are active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static const struct fb_videomode ecovec_dvi_modes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .name = "DVI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .xres = 1280,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .yres = 720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .left_margin = 220,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .right_margin = 110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .hsync_len = 40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .upper_margin = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .lower_margin = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .vsync_len = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) .sync = 0, /* hsync and vsync are active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static struct sh_mobile_lcdc_info lcdc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .ch[0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .interface_type = RGB18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .chan = LCDC_CHAN_MAINLCD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) .fourcc = V4L2_PIX_FMT_RGB565,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .panel_cfg = { /* 7.0 inch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .width = 152,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .height = 91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static struct resource lcdc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .name = "LCDC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .start = 0xfe940000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .end = 0xfe942fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .start = evt2irq(0xf40),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static struct platform_device lcdc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .name = "sh_mobile_lcdc_fb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .num_resources = ARRAY_SIZE(lcdc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .resource = lcdc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .platform_data = &lcdc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) static struct gpiod_lookup_table gpio_backlight_lookup = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .dev_id = "gpio-backlight.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) GPIO_LOOKUP("sh7724_pfc", GPIO_PTR1, NULL, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static struct property_entry gpio_backlight_props[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) PROPERTY_ENTRY_BOOL("default-on"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static struct gpio_backlight_platform_data gpio_backlight_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .fbdev = &lcdc_device.dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) static const struct platform_device_info gpio_backlight_device_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .name = "gpio-backlight",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .data = &gpio_backlight_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .size_data = sizeof(gpio_backlight_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) .properties = gpio_backlight_props,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static struct platform_device *gpio_backlight_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) /* CEU0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) static struct ceu_platform_data ceu0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .num_subdevs = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .subdevs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) { /* [0] = mt9t112 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .bus_width = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .bus_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .i2c_adapter_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .i2c_address = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) { /* [1] = tw9910 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .bus_width = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .bus_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .i2c_adapter_id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .i2c_address = 0x45,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static struct resource ceu0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .name = "CEU0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .start = 0xfe910000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .end = 0xfe91009f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .start = evt2irq(0x880),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) static struct platform_device ceu0_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .name = "renesas-ceu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) .id = 0, /* ceu.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .num_resources = ARRAY_SIZE(ceu0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .resource = ceu0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .platform_data = &ceu0_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) /* CEU1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static struct ceu_platform_data ceu1_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) .num_subdevs = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .subdevs = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) { /* [0] = mt9t112 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .bus_width = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .bus_shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .i2c_adapter_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .i2c_address = 0x3c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static struct resource ceu1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .name = "CEU1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .start = 0xfe914000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .end = 0xfe91409f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .start = evt2irq(0x9e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static struct platform_device ceu1_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .name = "renesas-ceu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .id = 1, /* ceu.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .num_resources = ARRAY_SIZE(ceu1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .resource = ceu1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .platform_data = &ceu1_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* Power up/down GPIOs for camera devices and video decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static struct gpiod_lookup_table tw9910_gpios = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) .dev_id = "0-0045",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) GPIO_LOOKUP("sh7724_pfc", GPIO_PTU2, "pdn", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static struct gpiod_lookup_table mt9t112_0_gpios = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) .dev_id = "0-003c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) GPIO_LOOKUP("sh7724_pfc", GPIO_PTA3, "standby",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static struct gpiod_lookup_table mt9t112_1_gpios = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .dev_id = "1-003c",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) GPIO_LOOKUP("sh7724_pfc", GPIO_PTA4, "standby",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) /* I2C device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) static struct tw9910_video_info tw9910_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .buswidth = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .mpout = TW9910_MPO_FIELD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static struct mt9t112_platform_data mt9t112_0_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) .flags = MT9T112_FLAG_PCLK_RISING_EDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) static struct mt9t112_platform_data mt9t112_1_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .flags = MT9T112_FLAG_PCLK_RISING_EDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) static struct i2c_board_info i2c0_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) I2C_BOARD_INFO("da7210", 0x1a),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) I2C_BOARD_INFO("tw9910", 0x45),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .platform_data = &tw9910_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) /* 1st camera */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) I2C_BOARD_INFO("mt9t112", 0x3c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) .platform_data = &mt9t112_0_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) static struct i2c_board_info i2c1_devices[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) I2C_BOARD_INFO("r2025sd", 0x32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) I2C_BOARD_INFO("lis3lv02d", 0x1c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .irq = evt2irq(0x620),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /* 2nd camera */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) I2C_BOARD_INFO("mt9t112", 0x3c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) .platform_data = &mt9t112_1_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* KEYSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static struct sh_keysc_info keysc_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .mode = SH_KEYSC_MODE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .scan_timing = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) .delay = 50,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) .kycr2_delay = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) .keycodes = { KEY_1, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) KEY_2, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) KEY_3, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) KEY_4, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) KEY_5, 0, 0, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) KEY_6, 0, 0, 0, 0, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) static struct resource keysc_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) .name = "KEYSC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) .start = 0x044b0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .end = 0x044b000f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .start = evt2irq(0xbe0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static struct platform_device keysc_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .name = "sh_keysc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .id = 0, /* keysc0 clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .num_resources = ARRAY_SIZE(keysc_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .resource = keysc_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .platform_data = &keysc_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /* TouchScreen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) #define IRQ0 evt2irq(0x600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) static int ts_get_pendown_state(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) int val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) gpio_free(GPIO_FN_INTC_IRQ0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) gpio_request(GPIO_PTZ0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) gpio_direction_input(GPIO_PTZ0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) val = gpio_get_value(GPIO_PTZ0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) gpio_free(GPIO_PTZ0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) gpio_request(GPIO_FN_INTC_IRQ0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return val ? 0 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) static int ts_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) gpio_request(GPIO_FN_INTC_IRQ0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static struct tsc2007_platform_data tsc2007_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) .model = 2007,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) .x_plate_ohms = 180,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .get_pendown_state = ts_get_pendown_state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .init_platform_hw = ts_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static struct i2c_board_info ts_i2c_clients = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) I2C_BOARD_INFO("tsc2007", 0x48),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .type = "tsc2007",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .platform_data = &tsc2007_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .irq = IRQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static struct regulator_consumer_supply cn12_power_consumers[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static struct regulator_init_data cn12_power_init_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .consumer_supplies = cn12_power_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) static struct fixed_voltage_config cn12_power_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .supply_name = "CN12 SD/MMC Vdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .microvolts = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .init_data = &cn12_power_init_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static struct platform_device cn12_power = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) .platform_data = &cn12_power_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static struct gpiod_lookup_table cn12_power_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .dev_id = "reg-fixed-voltage.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /* Offset 7 on port B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) NULL, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* SDHI0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static struct regulator_consumer_supply sdhi0_power_consumers[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static struct regulator_init_data sdhi0_power_init_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .constraints = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .valid_ops_mask = REGULATOR_CHANGE_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .consumer_supplies = sdhi0_power_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) static struct fixed_voltage_config sdhi0_power_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .supply_name = "CN11 SD/MMC Vdd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .microvolts = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .init_data = &sdhi0_power_init_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) static struct platform_device sdhi0_power = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .name = "reg-fixed-voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .platform_data = &sdhi0_power_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) static struct gpiod_lookup_table sdhi0_power_gpiod_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .dev_id = "reg-fixed-voltage.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* Offset 6 on port B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) GPIO_LOOKUP("sh7724_pfc", GPIO_PTB6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) NULL, GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) static struct gpiod_lookup_table sdhi0_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .dev_id = "sh_mobile_sdhi.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /* Card detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) GPIO_LOOKUP("sh7724_pfc", GPIO_PTY7, "cd", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static struct tmio_mmc_data sdhi0_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) MMC_CAP_NEEDS_POLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) static struct resource sdhi0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) .name = "SDHI0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) .start = 0x04ce0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .end = 0x04ce00ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .start = evt2irq(0xe80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static struct platform_device sdhi0_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .name = "sh_mobile_sdhi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .num_resources = ARRAY_SIZE(sdhi0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .resource = sdhi0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .platform_data = &sdhi0_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) /* SDHI1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) static struct tmio_mmc_data sdhi1_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) MMC_CAP_NEEDS_POLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static struct gpiod_lookup_table sdhi1_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) .dev_id = "sh_mobile_sdhi.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) /* Card detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) GPIO_LOOKUP("sh7724_pfc", GPIO_PTW7, "cd", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) static struct resource sdhi1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .name = "SDHI1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .start = 0x04cf0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) .end = 0x04cf00ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .start = evt2irq(0x4e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) static struct platform_device sdhi1_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .name = "sh_mobile_sdhi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .num_resources = ARRAY_SIZE(sdhi1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .resource = sdhi1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .platform_data = &sdhi1_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) #endif /* CONFIG_MMC_SH_MMCIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* MMC SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static struct mmc_spi_platform_data mmc_spi_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) .caps = MMC_CAP_NEEDS_POLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .caps2 = MMC_CAP2_RO_ACTIVE_HIGH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) .setpower = mmc_spi_setpower,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static struct gpiod_lookup_table mmc_spi_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .dev_id = "mmc_spi.0", /* device "mmc_spi" @ CS0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) /* Card detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY7, NULL, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) /* Write protect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY6, NULL, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) static struct spi_board_info spi_bus[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .modalias = "mmc_spi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) .platform_data = &mmc_spi_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) .max_speed_hz = 5000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) .mode = SPI_MODE_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /* MSIOF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static struct sh_msiof_spi_info msiof0_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .num_chipselect = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) static struct resource msiof0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .name = "MSIOF0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .start = 0xa4c40000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .end = 0xa4c40063,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) .start = evt2irq(0xc80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) static struct platform_device msiof0_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .name = "spi_sh_msiof",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .id = 0, /* MSIOF0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) .platform_data = &msiof0_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .num_resources = ARRAY_SIZE(msiof0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .resource = msiof0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) static struct gpiod_lookup_table msiof_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) .dev_id = "spi_sh_msiof.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) GPIO_LOOKUP("sh7724_pfc", GPIO_PTM4, "cs", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) /* FSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) static struct resource fsi_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .name = "FSI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .start = 0xFE3C0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) .end = 0xFE3C021d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) .start = evt2irq(0xf80),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) static struct platform_device fsi_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) .name = "sh_fsi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .num_resources = ARRAY_SIZE(fsi_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .resource = fsi_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) static struct asoc_simple_card_info fsi_da7210_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .name = "DA7210",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .card = "FSIB-DA7210",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .codec = "da7210.0-001a",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .platform = "sh_fsi.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .cpu_dai = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .name = "fsib-dai",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) .codec_dai = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) .name = "da7210-hifi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) static struct platform_device fsi_da7210_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) .name = "asoc-simple-card",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) .platform_data = &fsi_da7210_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) .dma_mask = &fsi_da7210_device.dev.coherent_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) /* IrDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static struct resource irda_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) .name = "IrDA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) .start = 0xA45D0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) .end = 0xA45D0049,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) .start = evt2irq(0x480),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) static struct platform_device irda_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .name = "sh_sir",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .num_resources = ARRAY_SIZE(irda_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) .resource = irda_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) #include <media/i2c/ak881x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) #include <media/drv-intf/sh_vou.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static struct ak881x_pdata ak881x_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) .flags = AK881X_IF_MODE_SLAVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static struct i2c_board_info ak8813 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) I2C_BOARD_INFO("ak8813", 0x20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) .platform_data = &ak881x_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static struct sh_vou_pdata sh_vou_pdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .bus_fmt = SH_VOU_BUS_8BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .board_info = &ak8813,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .i2c_adap = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static struct resource sh_vou_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) .start = 0xfe960000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) .end = 0xfe962043,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) .start = evt2irq(0x8e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) static struct platform_device vou_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) .name = "sh-vou",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) .num_resources = ARRAY_SIZE(sh_vou_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) .resource = sh_vou_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) .platform_data = &sh_vou_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) /* SH_MMCIF */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) static struct resource sh_mmcif_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .name = "SH_MMCIF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .start = 0xA4CA0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .end = 0xA4CA00FF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /* MMC2I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) .start = evt2irq(0x5a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) /* MMC3I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) .start = evt2irq(0x5c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static struct sh_mmcif_plat_data sh_mmcif_plat = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) .sup_pclk = 0, /* SH7724: Max Pclk/2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) .caps = MMC_CAP_4_BIT_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) MMC_CAP_8_BIT_DATA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) MMC_CAP_NEEDS_POLL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static struct platform_device sh_mmcif_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) .name = "sh_mmcif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) .platform_data = &sh_mmcif_plat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) .num_resources = ARRAY_SIZE(sh_mmcif_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) .resource = sh_mmcif_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) static struct platform_device *ecovec_ceu_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) &ceu0_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) &ceu1_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) static struct platform_device *ecovec_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) &heartbeat_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) &nor_flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) &sh_eth_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) &usb0_host_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) &usb1_common_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) &usbhs_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) &lcdc_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) &keysc_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) &cn12_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) &sdhi0_power,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) &sdhi0_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) &sdhi1_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) &msiof0_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) &fsi_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) &fsi_da7210_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) &irda_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) &vou_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) &sh_mmcif_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) #ifdef CONFIG_I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) #define EEPROM_ADDR 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) static u8 mac_read(struct i2c_adapter *a, u8 command)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) struct i2c_msg msg[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) u8 buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) msg[0].addr = EEPROM_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) msg[0].flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) msg[0].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) msg[0].buf = &command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) msg[1].addr = EEPROM_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) msg[1].flags = I2C_M_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) msg[1].len = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) msg[1].buf = &buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) ret = i2c_transfer(a, msg, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) printk(KERN_ERR "error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) buf = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) return buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) static void __init sh_eth_init(struct sh_eth_plat_data *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) struct i2c_adapter *a = i2c_get_adapter(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) if (!a) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) pr_err("can not get I2C 1\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) /* read MAC address from EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) for (i = 0; i < sizeof(pd->mac_addr); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) pd->mac_addr[i] = mac_read(a, 0x10 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) msleep(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) i2c_put_adapter(a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) static void __init sh_eth_init(struct sh_eth_plat_data *pd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) pr_err("unable to read sh_eth MAC address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) #define PORT_HIZA 0xA4050158
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) #define IODRIVEA 0xA405018A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) extern char ecovec24_sdram_enter_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) extern char ecovec24_sdram_enter_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) extern char ecovec24_sdram_leave_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) extern char ecovec24_sdram_leave_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) static int __init arch_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) struct clk *clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) bool cn12_enabled = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) /* register board specific self-refresh code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) SUSP_SH_RSTANDBY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) &ecovec24_sdram_enter_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) &ecovec24_sdram_enter_end,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) &ecovec24_sdram_leave_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) &ecovec24_sdram_leave_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) /* enable STATUS0, STATUS2 and PDSTATUS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) gpio_request(GPIO_FN_STATUS0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) gpio_request(GPIO_FN_STATUS2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) gpio_request(GPIO_FN_PDSTATUS, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) /* enable SCIFA0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) gpio_request(GPIO_FN_SCIF0_TXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) gpio_request(GPIO_FN_SCIF0_RXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) /* enable debug LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) gpio_request(GPIO_PTG0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) gpio_request(GPIO_PTG1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) gpio_request(GPIO_PTG2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) gpio_request(GPIO_PTG3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) gpio_direction_output(GPIO_PTG0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) gpio_direction_output(GPIO_PTG1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) gpio_direction_output(GPIO_PTG2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) gpio_direction_output(GPIO_PTG3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) /* enable SH-Eth */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) gpio_request(GPIO_PTA1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) gpio_direction_output(GPIO_PTA1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) mdelay(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) gpio_request(GPIO_FN_RMII_RXD0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) gpio_request(GPIO_FN_RMII_RXD1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) gpio_request(GPIO_FN_RMII_TXD0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) gpio_request(GPIO_FN_RMII_TXD1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) gpio_request(GPIO_FN_RMII_TX_EN, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) gpio_request(GPIO_FN_RMII_RX_ER, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) gpio_request(GPIO_FN_MDIO, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) gpio_request(GPIO_FN_MDC, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) gpio_request(GPIO_FN_LNKSTA, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) /* enable USB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) __raw_writew(0x0000, 0xA4D80000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) __raw_writew(0x0000, 0xA4D90000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) gpio_request(GPIO_PTB3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) gpio_request(GPIO_PTB4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) gpio_request(GPIO_PTB5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) gpio_direction_input(GPIO_PTB3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) gpio_direction_output(GPIO_PTB4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) gpio_direction_output(GPIO_PTB5, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) __raw_writew(0x0600, 0xa40501d4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) __raw_writew(0x0600, 0xa4050192);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) if (gpio_get_value(GPIO_PTB3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) printk(KERN_INFO "USB1 function is selected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) usb1_common_device.name = "r8a66597_udc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) printk(KERN_INFO "USB1 host is selected\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) usb1_common_device.name = "r8a66597_hcd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) /* enable LCDC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) gpio_request(GPIO_FN_LCDD23, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) gpio_request(GPIO_FN_LCDD22, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) gpio_request(GPIO_FN_LCDD21, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) gpio_request(GPIO_FN_LCDD20, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) gpio_request(GPIO_FN_LCDD19, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) gpio_request(GPIO_FN_LCDD18, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) gpio_request(GPIO_FN_LCDD17, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) gpio_request(GPIO_FN_LCDD16, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) gpio_request(GPIO_FN_LCDD15, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) gpio_request(GPIO_FN_LCDD14, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) gpio_request(GPIO_FN_LCDD13, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) gpio_request(GPIO_FN_LCDD12, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) gpio_request(GPIO_FN_LCDD11, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) gpio_request(GPIO_FN_LCDD10, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) gpio_request(GPIO_FN_LCDD9, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) gpio_request(GPIO_FN_LCDD8, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) gpio_request(GPIO_FN_LCDD7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) gpio_request(GPIO_FN_LCDD6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) gpio_request(GPIO_FN_LCDD5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) gpio_request(GPIO_FN_LCDD4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) gpio_request(GPIO_FN_LCDD3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) gpio_request(GPIO_FN_LCDD2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) gpio_request(GPIO_FN_LCDD1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) gpio_request(GPIO_FN_LCDD0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) gpio_request(GPIO_FN_LCDDISP, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) gpio_request(GPIO_FN_LCDHSYN, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) gpio_request(GPIO_FN_LCDDCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) gpio_request(GPIO_FN_LCDVSYN, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) gpio_request(GPIO_FN_LCDDON, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) gpio_request(GPIO_FN_LCDLCLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) gpio_request(GPIO_PTE6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) gpio_request(GPIO_PTU1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) gpio_request(GPIO_PTA2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) gpio_direction_input(GPIO_PTE6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) gpio_direction_output(GPIO_PTU1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) gpio_direction_output(GPIO_PTA2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) /* I/O buffer drive ability is high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) if (gpio_get_value(GPIO_PTE6)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) /* DVI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) lcdc_info.ch[0].clock_divider = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) /* No backlight */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) gpio_backlight_data.fbdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) gpio_set_value(GPIO_PTA2, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) gpio_set_value(GPIO_PTU1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) /* Panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) lcdc_info.ch[0].clock_divider = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /* FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) * LCDDON control is needed for Panel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) * but current sh_mobile_lcdc driver doesn't control it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) * It is temporary correspondence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) gpio_request(GPIO_PTF4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) gpio_direction_output(GPIO_PTF4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) /* enable TouchScreen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) i2c_register_board_info(0, &ts_i2c_clients, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) /* enable CEU0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) gpio_request(GPIO_FN_VIO0_D15, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) gpio_request(GPIO_FN_VIO0_D14, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) gpio_request(GPIO_FN_VIO0_D13, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) gpio_request(GPIO_FN_VIO0_D12, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) gpio_request(GPIO_FN_VIO0_D11, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) gpio_request(GPIO_FN_VIO0_D10, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) gpio_request(GPIO_FN_VIO0_D9, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) gpio_request(GPIO_FN_VIO0_D8, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) gpio_request(GPIO_FN_VIO0_D7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) gpio_request(GPIO_FN_VIO0_D6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) gpio_request(GPIO_FN_VIO0_D5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) gpio_request(GPIO_FN_VIO0_D4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) gpio_request(GPIO_FN_VIO0_D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) gpio_request(GPIO_FN_VIO0_D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) gpio_request(GPIO_FN_VIO0_D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) gpio_request(GPIO_FN_VIO0_D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) gpio_request(GPIO_FN_VIO0_VD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) gpio_request(GPIO_FN_VIO0_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) gpio_request(GPIO_FN_VIO0_FLD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) gpio_request(GPIO_FN_VIO0_HD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) /* enable CEU1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) gpio_request(GPIO_FN_VIO1_D7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) gpio_request(GPIO_FN_VIO1_D6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) gpio_request(GPIO_FN_VIO1_D5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) gpio_request(GPIO_FN_VIO1_D4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) gpio_request(GPIO_FN_VIO1_D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) gpio_request(GPIO_FN_VIO1_D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) gpio_request(GPIO_FN_VIO1_D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) gpio_request(GPIO_FN_VIO1_D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) gpio_request(GPIO_FN_VIO1_FLD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) gpio_request(GPIO_FN_VIO1_HD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) gpio_request(GPIO_FN_VIO1_VD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) gpio_request(GPIO_FN_VIO1_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) /* enable KEYSC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) gpio_request(GPIO_FN_KEYOUT3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) gpio_request(GPIO_FN_KEYOUT2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) gpio_request(GPIO_FN_KEYOUT1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) gpio_request(GPIO_FN_KEYOUT0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) gpio_request(GPIO_FN_KEYIN0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) /* enable user debug switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) gpio_request(GPIO_PTR0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) gpio_request(GPIO_PTR4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) gpio_request(GPIO_PTR5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) gpio_request(GPIO_PTR6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) gpio_direction_input(GPIO_PTR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) gpio_direction_input(GPIO_PTR4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) gpio_direction_input(GPIO_PTR5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) gpio_direction_input(GPIO_PTR6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) /* SD-card slot CN11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) gpio_request(GPIO_FN_SDHI0WP, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) gpio_request(GPIO_FN_SDHI0CMD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) gpio_request(GPIO_FN_SDHI0CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) gpio_request(GPIO_FN_SDHI0D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) gpio_request(GPIO_FN_SDHI0D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) gpio_request(GPIO_FN_SDHI0D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) gpio_request(GPIO_FN_SDHI0D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) gpiod_add_lookup_table(&mmc_spi_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) gpiod_add_lookup_table(&msiof_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* MMC/SD-card slot CN12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) gpio_request(GPIO_FN_MMC_D7, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) gpio_request(GPIO_FN_MMC_D6, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) gpio_request(GPIO_FN_MMC_D5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) gpio_request(GPIO_FN_MMC_D4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) gpio_request(GPIO_FN_MMC_D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) gpio_request(GPIO_FN_MMC_D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) gpio_request(GPIO_FN_MMC_D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) gpio_request(GPIO_FN_MMC_D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) gpio_request(GPIO_FN_MMC_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) gpio_request(GPIO_FN_MMC_CMD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) cn12_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) gpio_request(GPIO_FN_SDHI1WP, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) gpio_request(GPIO_FN_SDHI1CMD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) gpio_request(GPIO_FN_SDHI1CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) gpio_request(GPIO_FN_SDHI1D3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) gpio_request(GPIO_FN_SDHI1D2, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) gpio_request(GPIO_FN_SDHI1D1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) gpio_request(GPIO_FN_SDHI1D0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) cn12_enabled = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) if (cn12_enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) /* I/O buffer drive ability is high for CN12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) IODRIVEA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) /* enable FSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) gpio_request(GPIO_FN_FSIMCKB, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) gpio_request(GPIO_FN_FSIIBSD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) gpio_request(GPIO_FN_FSIOBSD, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) gpio_request(GPIO_FN_FSIIBBCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) gpio_request(GPIO_FN_FSIIBLRCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) gpio_request(GPIO_FN_FSIOBBCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) gpio_request(GPIO_FN_FSIOBLRCK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) /* set SPU2 clock to 83.4 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) clk = clk_get(NULL, "spu_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) if (!IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) clk_set_rate(clk, clk_round_rate(clk, 83333333));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) /* change parent of FSI B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) clk = clk_get(NULL, "fsib_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) if (!IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) /* 48kHz dummy clock was used to make sure 1/1 divide */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) clk_set_rate(&sh7724_fsimckb_clk, 48000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) clk_set_parent(clk, &sh7724_fsimckb_clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) clk_set_rate(clk, 48000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) gpio_request(GPIO_PTU0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) gpio_direction_output(GPIO_PTU0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) mdelay(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* enable motion sensor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) gpio_request(GPIO_FN_INTC_IRQ1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) gpio_direction_input(GPIO_FN_INTC_IRQ1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) /* set VPU clock to 166 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) clk = clk_get(NULL, "vpu_clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) if (!IS_ERR(clk)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) clk_set_rate(clk, clk_round_rate(clk, 166000000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) clk_put(clk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) /* enable IrDA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) gpio_request(GPIO_FN_IRDA_OUT, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) gpio_request(GPIO_FN_IRDA_IN, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) gpio_request(GPIO_PTU5, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) gpio_direction_output(GPIO_PTU5, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) /* Register gpio lookup tables for cameras and video decoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) gpiod_add_lookup_table(&tw9910_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) gpiod_add_lookup_table(&mt9t112_0_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) gpiod_add_lookup_table(&mt9t112_1_gpios);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) /* enable I2C device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) i2c_register_board_info(0, i2c0_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) ARRAY_SIZE(i2c0_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) i2c_register_board_info(1, i2c1_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) ARRAY_SIZE(i2c1_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) /* VOU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) gpio_request(GPIO_FN_DV_D15, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) gpio_request(GPIO_FN_DV_D14, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) gpio_request(GPIO_FN_DV_D13, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) gpio_request(GPIO_FN_DV_D12, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) gpio_request(GPIO_FN_DV_D11, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) gpio_request(GPIO_FN_DV_D10, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) gpio_request(GPIO_FN_DV_D9, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) gpio_request(GPIO_FN_DV_D8, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) gpio_request(GPIO_FN_DV_CLKI, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) gpio_request(GPIO_FN_DV_CLK, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) gpio_request(GPIO_FN_DV_VSYNC, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) gpio_request(GPIO_FN_DV_HSYNC, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) /* AK8813 power / reset sequence */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) gpio_request(GPIO_PTG4, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) gpio_request(GPIO_PTU3, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) /* Reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) gpio_direction_output(GPIO_PTG4, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) /* Power down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) gpio_direction_output(GPIO_PTU3, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) /* Power up, reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) gpio_set_value(GPIO_PTU3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) /* Remove reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) gpio_set_value(GPIO_PTG4, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) /* Initialize CEU platform devices separately to map memory first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) device_initialize(&ecovec_ceu_devices[0]->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) ceu0_dma_membase, ceu0_dma_membase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) ceu0_dma_membase +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) CEU_BUFFER_MEMORY_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) platform_device_add(ecovec_ceu_devices[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) device_initialize(&ecovec_ceu_devices[1]->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) ceu1_dma_membase, ceu1_dma_membase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) ceu1_dma_membase +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) CEU_BUFFER_MEMORY_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) platform_device_add(ecovec_ceu_devices[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) gpiod_add_lookup_table(&cn12_power_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) gpiod_add_lookup_table(&sdhi0_power_gpiod_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) gpiod_add_lookup_table(&sdhi0_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) gpiod_add_lookup_table(&sdhi1_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) gpiod_add_lookup_table(&gpio_backlight_lookup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) gpio_backlight_device = platform_device_register_full(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) &gpio_backlight_device_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) if (IS_ERR(gpio_backlight_device))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) return PTR_ERR(gpio_backlight_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) return platform_add_devices(ecovec_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) ARRAY_SIZE(ecovec_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) arch_initcall(arch_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) static int __init devices_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) sh_eth_init(&sh_eth_plat);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) device_initcall(devices_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) static void __init ecovec_mv_mem_reserve(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) phys_addr_t phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) phys_addr_t size = CEU_BUFFER_MEMORY_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) phys = memblock_phys_alloc(size, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) if (!phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) panic("Failed to allocate CEU0 memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) memblock_free(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) memblock_remove(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) ceu0_dma_membase = phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) phys = memblock_phys_alloc(size, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) if (!phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) panic("Failed to allocate CEU1 memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) memblock_free(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) memblock_remove(phys, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) ceu1_dma_membase = phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) static struct sh_machine_vector mv_ecovec __initmv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) .mv_name = "R0P7724 (EcoVec)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) .mv_mem_reserve = ecovec_mv_mem_reserve,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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