^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Renesas Europe EDOSK7760 Board Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008 SPES Societa' Progettazione Elettronica e Software Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Luca Santini <luca.santini@spesonline.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/smc91x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/sh_intc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/machvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/i2c-sh7760.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Bus state controller registers for CS4 area */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BSC_CS4BCR 0xA4FD0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BSC_CS4WCR 0xA4FD0030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SMC_IOBASE 0xA2000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SMC_IO_OFFSET 0x300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* NOR flash */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static struct mtd_partition edosk7760_nor_flash_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .name = "bootloader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .size = SZ_256K,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .mask_flags = MTD_WRITEABLE, /* Read-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .size = SZ_2M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .name = "fs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .size = (26 << 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .name = "other",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .size = MTDPART_SIZ_FULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static struct physmap_flash_data edosk7760_nor_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .width = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .parts = edosk7760_nor_flash_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .nr_parts = ARRAY_SIZE(edosk7760_nor_flash_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct resource edosk7760_nor_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .name = "NOR Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .start = 0x00000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .end = 0x00000000 + SZ_32M - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static struct platform_device edosk7760_nor_flash_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .resource = edosk7760_nor_flash_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .num_resources = ARRAY_SIZE(edosk7760_nor_flash_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .platform_data = &edosk7760_nor_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* i2c initialization functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static struct sh7760_i2c_platdata i2c_pd = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .speed_khz = 400,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static struct resource sh7760_i2c1_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .start = SH7760_I2C1_MMIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .end = SH7760_I2C1_MMIOEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) },{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .start = evt2irq(0x9e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .end = evt2irq(0x9e0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct platform_device sh7760_i2c1_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .platform_data = &i2c_pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = SH7760_I2C_DEVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .resource = sh7760_i2c1_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .num_resources = ARRAY_SIZE(sh7760_i2c1_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct resource sh7760_i2c0_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .start = SH7760_I2C0_MMIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .end = SH7760_I2C0_MMIOEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .start = evt2irq(0x9c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .end = evt2irq(0x9c0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static struct platform_device sh7760_i2c0_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .platform_data = &i2c_pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .name = SH7760_I2C_DEVNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .resource = sh7760_i2c0_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .num_resources = ARRAY_SIZE(sh7760_i2c0_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* eth initialization functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static struct smc91x_platdata smc91x_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static struct resource smc91x_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .start = SMC_IOADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .end = SMC_IOADDR + SZ_32 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .start = evt2irq(0x2a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .end = evt2irq(0x2a0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .flags = IORESOURCE_IRQ ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static struct platform_device smc91x_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .num_resources = ARRAY_SIZE(smc91x_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .resource = smc91x_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .platform_data = &smc91x_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* platform init code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct platform_device *edosk7760_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) &smc91x_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) &edosk7760_nor_flash_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) &sh7760_i2c0_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) &sh7760_i2c1_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static int __init init_edosk7760_devices(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) plat_irq_setup_pins(IRQ_MODE_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return platform_add_devices(edosk7760_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ARRAY_SIZE(edosk7760_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) device_initcall(init_edosk7760_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * The Machine Vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct sh_machine_vector mv_edosk7760 __initmv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .mv_name = "EDOSK7760",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };